SignalTap with no device JTAG?

Altera_Forum · ‎08-05-2009

Hi All,

I have some hardware to develop on but do not have access to the JTAG pins of the FPGA:mad: .

I don't want to even attempt a large design without being able to use SignalTap, ISMCE etc ... so

Is there a way to:

1) Use SignalTap etc without a JTAG port?

or

2) Instantiate a JTAG port core in logic, connect SignalTap to this (how?), and output my own JTAG signals on some test point (still using the USB blaster etc)?

Any help with this or alternative methods welcome.

Steve

Altera_Forum · ‎08-05-2009

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I have some hardware to develop on but do not have access to the JTAG pins of the FPGA.

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Don't know why, but if so, you have to face the consequences. It's a very bad design decision in my opinion.

SignalTap is basically a soft core, so it could be operated on a different interface in principle. But unfortunately, SignalTap as well as the virtual JTAG hub are protected Altera IP, so you won't be able to modify it as required. Also the SignalTap related virtual JTAG protocol is undocumented. That's the whole story, I think.