Simple FFT operation

[Altera_Forum]

Hi all, 

 I have a time domain signal and want to do an FFT to it and compare the converted value with a frequency domain signal.  Please suggest me ways do it.  I tried the FFT megacore function but i find it complex with all those sop, eop and other signals.  Suggest me a simple way by which i can have the whole of the time domain signal converted and stored in some location and then compare it with the frequency signal.  The length of the time domain signal be 1024.  Thanks Nadeem

[Altera_Forum]

--- Quote Start ---  Hi all,  I have a time domain signal and want to do an FFT to it and compare the converted value with a frequency domain signal.  Please suggest me ways do it.  I tried the FFT megacore function but i find it complex with all those sop, eop and other signals.  Suggest me a simple way by which i can have the whole of the time domain signal converted and stored in some location and then compare it with the frequency signal.  The length of the time domain signal be 1024.  Thanks Nadeem  --- Quote End ---    My simplest way is matlab: y = fft(x,1024); %that's all  if you want to do it on fpga then you have do Fourier transform either through  (1) fft core done by vendor or  (2) design from basics.  (3) use dspbuilder. You drag fft block, set the parameters and you are done. (4) use matlab HDL coder(not sure about the exact name but its Mathworks tool to convert matlab code such as above to HDL. I am told this is too expensive.

[Altera_Forum]

--- Quote Start ---  My simplest way is matlab: y = fft(x,1024); %that's all  if you want to do it on fpga then you have do Fourier transform either through  (1) fft core done by vendor or  (2) design from basics.  (3) use dspbuilder. You drag fft block, set the parameters and you are done. (4) use matlab HDL coder(not sure about the exact name but its Mathworks tool to convert matlab code such as above to HDL. I am told this is too expensive.  --- Quote End ---   Yeah i want to do it on FPGA  Is the DSPbuilder present in QuartusII, is it in the block builder or a different one, if so could you please give the path where i can access it in quartusII.

[Altera_Forum]

--- Quote Start ---  Yeah i want to do it on FPGA  Is the DSPbuilder present in QuartusII, is it in the block builder or a different one, if so could you please give the path where i can access it in quartusII.  --- Quote End ---    Altera first marketed DSPBuilder then Advanced DSPBuilder. They are licensed separately from quartus (I think) and are launched from simulink. DSPBuilder supports basic blocks such as counters,adders, registers i.e. things you can do by hand or through schematic anyway.  ADSPBuilder suports filters,fft,mixers...etc, a great tool but does not interface with DSPBuilder blocks readily, this is just to make sure not to make your life very easy.

[Altera_Forum]

--- Quote Start ---  Altera first marketed DSPBuilder then Advanced DSPBuilder. They are licensed separately from quartus (I think) and are launched from simulink. DSPBuilder supports basic blocks such as counters,adders, registers i.e. things you can do by hand or through schematic anyway.  ADSPBuilder suports filters,fft,mixers...etc, a great tool but does not interface with DSPBuilder blocks readily, this is just to make sure not to make your life very easy.  --- Quote End ---   Thank you for the info.  Is it possible to use the FFT megacore with minimum inputs, if so what are the minimum inputs an FFt megacore needs.

[Altera_Forum]

I did fft in 2000 with its very first buggy versions. I had to stream it myself using two cores in a queue so you should not despair. 

I am lucky not using it anymore but in general an fft module will need: clock reset real data input imag data input data valid (a signal that indicates data to be read into fft if system clock is faster than data or data comes bursty...etc) start of frame (i.e. your input ha to be split into 1024 segments, each processed anf finished after some given time) indicated by data ready

[Altera_Forum]

--- Quote Start ---  I did fft in 2000 with its very first buggy versions. I had to stream it myself using two cores in a queue so you should not despair. I am lucky not using it anymore but in general an fft module will need: clock reset real data input imag data input data valid (a signal that indicates data to be read into fft if system clock is faster than data or data comes bursty...etc) start of frame (i.e. your input ha to be split into 1024 segments, each processed anf finished after some given time) indicated by data ready  --- Quote End ---    Thanks for your ideas.  I will try out these things and see if my life gets anybit easier.