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Simple solution for external memory writes on CycloneIII sterter board.

Altera_Forum
Honored Contributor II
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Hi, 

 

I have Cyclone3 started board connected via HSMC slot for data input from ADS5484EMV 200MSPS/16Bit ADC of Texas Instruments. 

 

I implemented small numerical algorithm that converts my continiously sampled data (16bits LVDS with 200MHz) to something like 100kbits/s data and tested it with sda/scl output pins. It works ok. My program is written on Verylog. 

 

Now I want to write this data bit by bit to the DDR memory to be able to load it to computer via USB-Blaster. 

 

So, I have something like 

 

wire [31:0] Data; // output from my Verilog module, 

wire MyClock; // ca. 10KHz 

wire [22:0] Position; // I can generate it if is required 

 

and need your kind suggestion what kind of module I can write (or pick up an example) to store my data continiously to the DDR memory (it is 256MBit, so, I hope that I cannot run it out in 10 minutes). 

 

Please, help me with a simple example how to do it! 

 

Sincerely, 

 

Ilghiz
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Altera_Forum
Honored Contributor II
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Hello, 

 

Altera has DDR controler IP available. 

 

For your purposes, I believe the easiest way would to make your processed data available with an Avalon interface.  

Can be either an Avalon-MM slave or a or Avalon-ST source. At your rates, it hardly matters.  

 

You can then build a SOPC with  

a) your component 

b) a DDR controler component 

c) a NIOS II processor component 

d) JTAG-UART component to handle the data transfer 

 

"b)" to "c)" are readily available for you in the SOPC builder. 

 

You can then write a small program (in C) for NIOS to read processed data from your component and store it in DRAM and to comunicate with the PC over USB-Blaster.
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Altera_Forum
Honored Contributor II
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Dear Rbugalho, 

 

thank you for your fast reply... Actually, I tried b) and c) ways, but unsuccesfull: 

 

b) I did not understand what memory I should choose from the large list; 

 

c) was unable to fix all errors occured during this connection... 

 

BTW, is can I use lpm_ram_dp for my purposes? 

 

Sincerely, 

 

Ilghiz
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Altera_Forum
Honored Contributor II
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There a bunch of examples that use NIOS and DDR included in the startkit CD. 

 

This topic has some usefull information about setting up the DDR controller for that board in this thread: 

http://www.alteraforum.com/forum/showthread.php?t=2379 

 

You can use lpm_ram_dp, but it's implemented in the FPGA's memory blocks. The starter kit has an EP3C25, so you'll have less than 600 kbit of memory available.
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