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Stratix2Gx word aligner

Altera_Forum
Honored Contributor II
‎09-09-2009 08:02 PM
1,188 Views

I have succeeded to implement high speed channel in basic mode, and even managed to transfer data to reciever. The problem is that I am getting some bits that should not be there. Here is what I get: 

trasiver data: 01 02 03 04 05 06 07 08 09....10 20 30 40... 

recieved data: 80 01 81 02 82 03 83 04 84 05....10 18 20 28 30 38... 

I am reading from a memory, and writing to a memory (another one). The first one syncronized by tx_clkout, and the second by rx_clkout. 

My channei is 8 bit wide, and work frequency is 156MHz. 

Is there any idea why do I get this extra bites?
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