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Hi,
Will Altera support the IEEE float package somewhere in the future for synthesis, so you do not need to add floating point cores, generated by Megawizard, but simply use VHDL statements like "*" and "+" for float32 and float64 types? ThanksLink Copied
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I doubt it will be any time soon as that package has no pipelining.
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You could always request an enhancement request via my support.

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