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hello, I work on a Cyclone V SoC dev kit of Terasic with the Cyclone V SX SoC—5CSXFC6D6F31C8NES FPGA. I have a simple design in Qsys using the Altera VIP (test pattern generator, monitor, trace system and clocked video output) but when I configured the FPGA and launch the system console, I have always the same warning :
FPGA does not contain SystemConsole USB soft logic (no I2C ack) And I don't see the "trace table view" option Under "Tools". I verified the design with SignalTap and I saw valid datas in output. Does anybody have an idea ?Link Copied
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This error message means that the USB-Blaster II MAX device is not correctly connected to its soft logic in the FPGA. Have you connected the pins on the trace system to the appropriate pins on the device. Please check the USB_SDA and USB_SCL pins first.
It would help if you said which version of the software you are using, and which OS you are running on. The trace table view will not appear until SystemConsole has found a trace system in the hardware.- Mark as New
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Hi lanix,
Did you find a solution to your problem? I have the exact same problem. Thanks- Mark as New
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Hi,
For me, the problem was just the first parameter in the trace system. It's something like "connect to manuel debug ..." and I just change it to "Yes".
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