Timing with a NIOS II Multi-Cycle/Internal Register File Custom Instruction

[Altera_Forum]

Your opinion on the following matter would be appreciated. 

 I've implemented a NIOS II Multi-Cycle/Internal Register File Custom Instruction (attached here). All works well, except the design does not pass TimeQuest without timing exceptions. Let's say that my clock is with a period of 10 ns. TimeQuest reports a data violation of 15 ns from the custom instruction input to the custom instruction result/internal accumulator. This shouldn't be the case because the instruction is multi-cycle. So, I have the following question:  1. Shouldn't the SOPC builder automagically relax this in its .sdc file? 2. I'm relaxing manually the constraints and I have figured out three ways to do that. 2.1. Declare false pahts: I don't like that because these are not false paths; 2.2. Increase the max delay: doesn't sound credible either; 2.3. Introduce multi-cycle delays in the following manner:   --- Quote Start ---  set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|D_iw*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src1*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src2*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|D_iw*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src1*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src2*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -setup -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|D_iw*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -hold -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src1*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -hold -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src2*}] -to [get_keepers {*cpu_0:the_cpu_0|W_alu_result*}] -hold -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|D_iw*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -hold -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src1*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -hold -end 2 set_multicycle_path -from [get_keepers {*cpu_0:the_cpu_0|E_src2*}] -to [get_keepers {*sum_prod_pulse:cpu_0_sum_prod_pulse_inst|acc*}] -hold -end 2   --- Quote End ---  The above does the job but I'm not sure if this is the right way: all the documentation I've read is that set_multicycle_path is for when you have multiple clocks with different period, and this is clearly not the case.