To few pins device

Altera_Forum · ‎08-01-2011

Hi, I would like to know if there's some way I can deactivate the i/o check when I compile some code, or how can I make the devices with more than 1025 pins available.

If I serch for some bigger devices on settings, all devices with the quantity of pins I need is "not installed".

Since I need my code to work just on the simulation, I would like to know what can I do to Quartus compile my 1025 i/o pins code.

Thanks.

Altera_Forum · ‎08-01-2011

Strictly speaking, you cannot disable the I/O check any way that I'm aware of. It's part of the Fitter process. What you could do however is set your I/O to be virtual pins (or at least enough of them so that you will fit in the device). You can make these settings in the Assignment Editor. Virtual pins will be disconnected from the device I/O, and will not cause anything to be optimized away.

Altera_Forum · ‎08-01-2011

Are you getting an error during the Fitter stage? If yes, you need to set those pins as virtual pins. To set as virtual pins:

Assignments -> Assignment Editor -> double click on "To" cell and click on node finder -> Filter out the pins you want to assign as virtual.

You can just do for any one of the pins and then go back to the .qsf file and copy-paste the similar thing for all the nodes[copy the nodes from the node finder]. Use notepad++

NOTE: you cannot set bidirectional pins as virtual pins. though you can assign them in your .qsf file, you can still see them having a physical pin location on the FPGA.

Altera_Forum · ‎08-01-2011

Thanks guys, I can't test right now if that will work cause I'm not on my laptop, but I believe so.

Actually doesn't matter the pins, cause I will call this *.VHD as a component (label, port map. Sorry I don't know how it's really called) and this new file will direct the data for each one of the first file pins. Maybe I could use even signals as i/o since it's not real i/o pins, but I don't know if it's possible.

I will test your tips soon.

Appreciate the help.

Thank You!

Altera_Forum · ‎08-01-2011

note that Virtual Pins are only supported in Subscription Edition (as they are designed as part of Incremental Compilation)

Altera_Forum · ‎08-02-2011

--- Quote Start ---

Thanks guys, I can't test right now if that will work cause I'm not on my laptop, but I believe so.

Actually doesn't matter the pins, cause I will call this *.VHD as a component (label, port map. Sorry I don't know how it's really called) and this new file will direct the data for each one of the first file pins. Maybe I could use even signals as i/o since it's not real i/o pins, but I don't know if it's possible.

I will test your tips soon.

Appreciate the help.

Thank You!

--- Quote End ---

you wouldnt be able to connect them to dangling signals, because the synthesisor will just see them as not connected to top level IO and synthesise them all away (and your entire design).

You can do a workaround if you dont have the subscription edition. Just run all of the component ios through some logic gates (like ands and ors and stuff) and then connect them to top level IO - this will prevent them from being synthesised away.

Altera_Forum · ‎08-02-2011

I'm using the Quartus II 9.0 Web Edition, that came with the DE2 Board.

If I download the Subscribed Edition, it's free to get a license?

I tried to set as virtual pin. On "To" I put the pin I want and "Assignment Name" I selected "Virtual Pin". But when I compile I get the same error.

tricky (http://www.alteraforum.com/forum/member.php?u=7270),

I'm sorry I didn't understood it right, my english isn't very good.

Could you make me an simple example with just one pin?

I know I will not get an error with just one pin, but just for me to understand that.

For example:

LIBRARY ieee;

USE ieee.std_logic_1164.all;

ENTITY x IS

PORT (

xx: IN STD_LOGIC);

END x;

ARCHITECTURE y OF x IS

END y;

I was thinking also, can't I download somewhere the bigger devices and install it?

Thank you.

Altera_Forum · ‎08-02-2011

Do you see "Total Virtual Pins : 1" in the compilation report ? [I think you have set only one pin to virtual an left the others as it is]

Altera_Forum · ‎08-02-2011

Actually I have the Web Edition.

When I compile I have the following warning:

Warning: Feature Virtual IO is not available with your current license.

Altera_Forum · ‎08-02-2011

Oh..alright.