Transceiver Toolkit for Serial Lite III

[shaiko]

Hello.

I'd like to connect an Arria 10 and a Stratix 10 FPGA with a 4 lane Serial Lite III duplex interface.

Should I use Intel's Transceiver Toolkit to debug the design? Or is there a more recommended tool for Serial Lite III ?

[ZiYing_Intel]

Hi,

I would more recommend toward using Serial Lite III Streaming Intel FPGA IP. Serial Lite III Streaming Intel FPGA IP is a high-speed serial communication protocol for chip-to-chip, board-to-board, and backplane application data transfers. This protocol offers high bandwidth, low overhead frames, low I/O count, and supports scalability in both number of lanes and lane speed.

The Serial Lite III Streaming Intel FPGA IP incorporates a media access control (MAC) block, a physical coding sublayer (PCS), and a physical media attachment (PMA). The IP transmits and receives streaming data through the Avalon® streaming interface on its FPGA fabric interface.

For further details about the Serial Lite III IP support in Intel Stratix 10 and Arria 10 devices, please do refer link below, Section 2.3, https://www.intel.com/content/www/us/en/docs/programmable/683330/22-4-20-0-0/performance-and-resource-utilization.html

Best regards,

Zi Ying

[shaiko]

Hello,

I'm sorry, but this doesn't answer my question.

I'm asking about using the Transceiver Toolkit together with the Serial Lite III IP.

[ZiYing_Intel]

Hi,

It need depends on your project requirement but it was suggested to use the Intel's transceiver toolkit with Serial Lite III IP. For your information, Serial Lite III only supports Intel® Stratix® 10, Intel® Arria® 10 Arria® V GZ, and Stratix® V FPGA devices.

Best regards,

zying

[ZiYing_Intel]

Hi,

Do you still have any question about this case?

Best regards,

Zi Ying

[ZiYing_Intel]

Hi,

Since no hear any feedback from you, I am now close the case. If you have any issue after the case closed, please do feel free to submit another issue.

Best regards,

zying