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15806 Discussions

Unable to read and write to FPGA memory using PCIe




I have interfaced iMX8 Processor and FPGA using the PCIe Hard IP generated from intel Quartus Prime software v21.4.

When I do "lspci" on iMX8, the cyclone 10 device is being detected. However when I try to write and read from the Bar0 and Bar2 memory the below issues occur :

1. I am writing 0x012 in Bar0 viz., resource 0

setpci -s 01:00 COMMAND=0x02
./imx8_pcimem /sys/bus/pci/devices/0000:01:00.0/resource0 0x08 w 0x11

2. When I am reading in this location I should get 0x02. However, I am getting 0xFF as readback.


Looking for some solution on this. Support and solutions are much appreciated.!



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Hi Sir

Your Cyclone 10 device is being detected but unbale to write/read from the Bar0 and Bar2 memory, it could be due to the BUS Master Enable bit still not being enabled.

You can type lspci -vvn -s xx:xx.xx to check the Command Register settings of the PCIe, send me the screenshot.

Please set the IO_Space_enable bit[0], Memory Space enable bit[1] and Bus Master bit[2] in Command register to 1, this is bit[0], bit[1], bit[2] at configuration space offset 0x4.

Example, set these registers using: setpci -s 01:00 COMMAND=0x7