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17267 Discussions

Unconstrained input and output

Altera_Forum
Honored Contributor II
‎11-07-2015 03:40 PM
1,935 Views

Hi, 

 

I begin today with Deo-Nano and FPGA. It's nice and very very different approach from C# and Visual Studio :):) 

Then, my Deo-Nano begin to work well with Quartus II. I have CLK_50 input and a pin on output then my scope is 50MHz, nice :p. I have these messages, see the capture. 

http://www.alteraforum.com/forum/attachment.php?attachmentid=11397&stc=1  

 

Thanks for your help 

 

Jennifer
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Altera_Forum
Honored Contributor II
‎11-09-2015 05:38 AM
865 Views

Hi, 

 

Not sure if it is my problem, I could not view the attached screenshot. Mind re-attach?
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Altera_Forum
Honored Contributor II
‎11-09-2015 05:39 AM
865 Views

I am not able to view the capture too. By the way, seems like your design is working as you can get 50MHz at scope. Is this not your target implementation?

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Altera_Forum
Honored Contributor II
‎11-09-2015 05:41 AM
865 Views

Hi, 

 

Maybe you can post the warning messages (if error, then your design should not have worked) here and elaborate your concern.
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Altera_Forum
Honored Contributor II
‎11-14-2015 08:48 AM
865 Views

Hi, 

 

My project works, it haven't error. But why this warnings ? I have for all projects. 

 

Best regards 

 

Jennifer
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Altera_Forum
Honored Contributor II
‎11-16-2015 03:13 AM
865 Views

Mind posting the messages to the thread? Since your project works, I believe the warnings can be ignored.

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