Unconstrained input and output

Altera_Forum · ‎11-07-2015

Hi,

I begin today with Deo-Nano and FPGA. It's nice and very very different approach from C# and Visual Studio :):)

Then, my Deo-Nano begin to work well with Quartus II. I have CLK_50 input and a pin on output then my scope is 50MHz, nice :p. I have these messages, see the capture.

http://www.alteraforum.com/forum/attachment.php?attachmentid=11397&stc=1

Thanks for your help

Jennifer

Altera_Forum · ‎11-09-2015

Hi,

Not sure if it is my problem, I could not view the attached screenshot. Mind re-attach?

Altera_Forum · ‎11-09-2015

I am not able to view the capture too. By the way, seems like your design is working as you can get 50MHz at scope. Is this not your target implementation?

Altera_Forum · ‎11-09-2015

Hi,

Maybe you can post the warning messages (if error, then your design should not have worked) here and elaborate your concern.

Altera_Forum · ‎11-14-2015

Hi,

My project works, it haven't error. But why this warnings ? I have for all projects.

Best regards

Jennifer

Altera_Forum · ‎11-16-2015

Mind posting the messages to the thread? Since your project works, I believe the warnings can be ignored.