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I'm trying to learn my way around the ModelSim-Altera 6.1g simulator (full version). Currently, I have been able to perform block-level simulations using Cadence NCSim on a UNIX box. Everything is driven using scripts (no GUI control, except to look at waveforms). Now, I'm trying to take that same testbench and setup, and port it over to the ModelSim-Altera simulator on the PC. So far, I've found a couple of equilivant commands, but not sure about setting up libraries, or once the simulation is done, how to view the waveforms.
I do not need to create stimulus files, since the testbench already does that. If you have a method you use that involves command-line driven testing, I'd like to hear from you. Also, if you've ever created full chip-level simulations using the Nios processor, I'd really to hear from you!!!Link Copied
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I typically setup up a script like below and run it from the command line using:
%> vsim -gui -do "source example.tcl" Where example.tcl might look something like: set DESIGN_NAME "pipe" set WAVE_FILE wave.do set FORCE_LIB_RECOMPILE 0 # Quit the simulation environment if you are running one quit -sim # Create and open a project if {[file exists ${DESIGN_NAME}_sim.mpf]} { project open ${DESIGN_NAME}_sim } else { project new . ${DESIGN_NAME}_sim } # Compile Altera libraries if {![file exists altera_primitives] || $FORCE_LIB_RECOMPILE} { vlib altera_primitives vmap altera_primitives altera_primitives vcom -work altera_primitives $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_primitives_components.vhd vcom -work altera_primitives $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_primitives.vhd } if {![file exists altera_mf] || $FORCE_LIB_RECOMPILE} { vlib altera_mf vmap altera_mf altera_mf vcom -work altera_mf $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf_components.vhd vcom -work altera_mf $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf.vhd } if {![file exists lpm] || $FORCE_LIB_RECOMPILE} { vlib lpm vmap lpm lpm vcom -work lpm $env(QUARTUS_ROOTDIR)/eda/sim_lib/220pack.vhd vcom -work lpm $env(QUARTUS_ROOTDIR)/eda/sim_lib/220model.vhd } if {![file exists sgate] || $FORCE_LIB_RECOMPILE} { vlib sgate vmap sgate sgate vcom -work sgate $env(QUARTUS_ROOTDIR)/eda/sim_lib/sgate_pack.vhd vcom -work sgate $env(QUARTUS_ROOTDIR)/eda/sim_lib/sgate.vhd } # Compile project source code vlog -incr -sv ../src/${DESIGN_NAME}.v vlog -incr -sv ./${DESIGN_NAME}_tb.v # Quit without asking set PrefMain(forceQuit) 1 # Compile the simulation vsim -gui -novopt +transport_int_delays +transport_path_delays +notimingchecks work.${DESIGN_NAME}_tb # Open the waveform viewer and set the title of the window view wave -title "${DESIGN_NAME} simulation vectors" # Open the signals viewer view signals # Run the .do file to load the signals to be viewed do $WAVE_FILE # Run the simulation run -all puts "QUARTUS_ROOTDIR is $env(QUARTUS_ROOTDIR)"- Mark as New
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Ahhh, yes. This is what I am looking for. Definitely will use your TCL example as a baseline. Thanks!
Have you ever run a full chip-level sim using a Nios processor? If so, what issues did you run into?- Mark as New
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--- Quote Start --- Also, if you've ever created full chip-level simulations using the Nios processor, I'd really to hear from you!!! --- Quote End --- Have you looked at Application Note 351, "Simulating Nios II Embedded Processor Designs"? I haven't looked at this one, but I'm hoping it covers the kinds of things I asked to be improved in the old Nios/ModelSim app note. Whatever the state of AN 351, maybe some Forum people will have some good additional suggestions.
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I just found it, so I'll bookmark it and read it later. Right now, I'm trying to setup a ModelSim simulation environment for the PC. The first reply to this thread example gives me a good starting point.
I do have a couple of questions......is it really necessary to always for each simulation performed? And if the Altera libraries are already come pre-compiled, how do you "point" to them? Is there a ModelSim setup file that is read by vsim? Or would I need to use vmap and vlib?- Mark as New
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--- Quote Start --- And if the Altera libraries are already come pre-compiled, how do you "point" to them? Is there a ModelSim setup file that is read by vsim? Or would I need to use vmap and vlib? --- Quote End --- Here are a few lines from scripts I used 3 years ago. This might need adjusting. The default directory structure has changed since then.
set ModelSim_OEM_install $::env(MODEL_TECH); # Setting ModelSim_OEM_install to location of ModelSim that is executing this
set ModelSim_OEM_install $ModelSim_OEM_install/..; # script. The ".." is to get above the win32aloem directory.
vlib lpm
vlib altera_mf
vmap altera_mf $ModelSim_OEM_install/altera/vhdl/altera_mf;
vmap lpm $ModelSim_OEM_install/altera/vhdl/220model;
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I just noticed something in my last reply.....one that thing that I left out was this: is it really necessary to always create a project for each simulation run? Can I just point to the pre-compiled Altera libraries, compile the source code and then run the simulation?
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I never create a ModelSim project intentionally, although I think I've seen one get created for me. I just open the GUI and then run scripts with the vlib, vmap, vcom, vsim, and run commands. I'm not a ModelSim expert and never bothered to find out what advantages a ModelSim project has.
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godfather, can you cut and paste the contents of the file "waves.do"? This would help me in understanding the syntax of the macro.
I have a few questions here.......in the example sent by godfather, I'm assuming all of these tcl commands are executed within the ModelSim environment. However, I am creating a MS-DOS batch script to execute these command outside the vsim enviroment. This would be similar to using a csh script on a UNIX box. I'm trying to run the simulator, possibly in gui mode (not sure yet), and then run the waveform viewer after it's complete. To execute the sim, I'm using: vsim <options> cfg_FPGA_tb, where cfg_FPGA_tb is the configuration name of the VHDL testbench. The idea is to run the sim until completion, and let the testbench stop it from running (this is how I currently have the ncsim environment setup). To generate a signal list to view, how do I tell the simulator which areas of the design I want to view (with ncsim, I have to use the probe command and the hierarchical path to the area I want to look at)? To view the results with ModelSim, from what I can understand so far, is to use the "view" command within vsim. So, I'm guessing that I would use a command similar to vsim -do waveforms.do, where waveforms.do would contain the commands to view the results of the simulation. If I'm missing something here, please let me know.- Mark as New
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When running the simulation, ModelSim is complaining that there is a 'U'|'X'|'W'|'Z'|'-' in some of the lpm components and therefore, the result will be X's. I'll trying to resolve this with a command-line option, but so far nothing is working.
If you've resolved this issue before, I'd like to hear from you.- Mark as New
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Hello,
the 'U'|'X'|... is an everydays ModelSim issue. In many cases,it simply indicates that a signal isn't initialized. If you have e. g. a clock dividing counter, you will never see a clock output from this counter unless you initialize it either explicitely (e. g. during reset) or add a power on default to the signal definition. This is apparently different from real life FPGA behaviour, but is necessary to discover all possible uncertainties in FPGA code, I think. Also the behaviour regarding INOUT signal's initial state is different. With ModelSim you need an explicite initialisation to 'Z', otherwise an uninitialized INOUT could drive the bus to 'X', Quartus in contrast assumes 'Z' as default. Regards, Frank- Mark as New
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I was able to suppress these warnings within ModelSim by setting StdArithNoWarnings = 1 in the modelsim.ini file. This setting is automatically written to modelsim.ini by the ModelSim GUI (Simulate->Runtime Options...Suppress Warnings: From Synopsys Packages).
This was a good exercise, because I was able to learn additional "under the hood' features about ModelSim.
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