Hello, I would to know how accurate SignalTap is when capturing signals such as an 80-Mhz clock from a pll that is used to drive logic? When I view such a signal I see a non 50-percent duty cycle clock. My reference clock for SignalTap is my 80Mhz input clock. Could this be internal jitter on the clock from a pll?Any ideas? Thanks, Joe
Is there a reason why you need to see the clock in SignalTap? Remember, it's best if your sampling clock is twice the frequency of what you're monitoring. So with an 80 MHz sampling clock used to look at an 80 MHz clock, it may miss edges, which is what you are seeing.
It's not entirely clear what you are saying. Are you saying you are trying to capture signals that are asynchronous to the 80 Mhz SignalTap clock. If so, then yes, there will be issues. But if you are capturing signals for registers driven by that clock, then it should not be a problem.
--- Quote Start --- Well, I found an answer to my question. My co-worker said that SignalTap is not reliable to capture and show high rate clocks. --- Quote End --- Signal tap isnt really designed to capture clocks at all. You are supposed to connect a clock only as the sampling clock and then capture logic that is all within that clock domain. Anything else (like asynchronous signals) just isnt really what it's designed for.
Hi corestar,Thanks for adding in your comments. I'm trying to view an 80Mhz signal that drives my HDL module. The signal is from a pll with an input clock of 80Mhz.
--- Quote Start --- Hi corestar, Thanks for adding in your comments. I'm trying to view an 80Mhz signal that drives my HDL module. The signal is from a pll with an input clock of 80Mhz. --- Quote End --- This sounds like a clock? why are you trying to signaltap it? it either works or it doesnt. Usually you would capture the locked signal, or output to an LED or something.