Hi,
I have recently purchased a Terasic DE3 development board. Being familiar with VHDL I had written VHDL code for the target device in order to get an idea of the resource requirements prior to buying the board.
The development kit is supplied with some "system builder" software which automatically generates a project containing a top level design ready for users to add their own code. My problem is that the top level design is written in Verilog. I am not familiar with Verilog, It seems logical enough and I'm sure that if I spent some time I could easily convert the code into VHDL in line with my original design or maybe just use the Verilog top level design as is. The problem is that the board is very expensive and I don't want to damage it by overlooking anything. A concern is that looking at the Verilog code (attached) I wouldn't know how to deal with the I/O Group Voltage Configuration Verilog code.
I was hoping that someone here may be able to advise as to how to proceed with conversion or ideally have a VHDL top level project file that they know works on a DE3 or similar development board.
Many thanks
David
