Verilog Problem hexadecimal sum

[Altera_Forum]

Hey everybody i have a question that i can't solve. 

  -We wish to display the hexadecimal value of an 8-bit number A on the two 7-segment displays HEX[3:2]  -We also wish to display the hex value of an 8-bit number B on the two 7-segment displays HEX[1:0]  -The values of A and B are inputs to the circuit which are provided by means of switches SW7[7:0].   -To input the values of A and B, first set the switches to the desired value of A, store these switch values in a register, and then change theswitches to the desired value of B.  -Finally, use an adder to generate the arithmetic sum S = A + B, and display this sum on the 7-segment displays HEX[5:4] Show the carry-out produced by the adder on LEDR[0].   1. Create a new Quartus II project which will be used to implement the desired circuit on the DE1-SoC board. 2. Write a Verilog file that provides the necessary functionality. Use KEY0 as an active-low asynchronous reset, and use KEY1 as a clock input. 3. Include the necessary pin assignments for the pushbutton switches and 7-segment displays, and then compile the circuit. 4. Download the circuit onto the DE1-SoC board and test its functionality by toggling the switches and observing the output displays

[Altera_Forum]

--- Quote Start ---   Hey everybody i have a question that i can't solve.   --- Quote End ---   You have not tried very hard then :)  I've posted plenty of example designs that include hexadecimal decoders in both VHDL and SystemVerilog. Those designs were not for the DE1-SoC, but that is only a matter of pin assignments.  Here's one in Verilog http://www.alteraforum.com/forum/showthread.php?t=34391  Here's a DE2 project in VHDL http://www.alteraforum.com/forum/showthread.php?t=33462  These examples will not "do your homework" for you, but they will help you get started. The members of this forum try not to do student's homework for them, but we do help when you show you have got something started, and get stuck.  Your plan should be modified slightly. You should use the on-board clock for the clock source, not the KEY1 signal. Push buttons "bounce" when you press them, so you would end up with multiple clock edges for each button press. Depending on the hardware design, there might be Schmitt trigger debouncing on the board, or you might need to add it using FPGA logic. Look at the schematics for the board, and use SignalTap II to trace the activity on the KEY1 input while using the on-board clock as a clock source. Since the KEY signal is asynchronous, you will need to use a synchronizer circuit (read about them in the Quartus handbook).  Your design would then use the synchronized version of KEY1 to create a single clock pulse each time KEY1 is pressed. This enable pulse would enable the sum registers.  Make sure you write a testbench for your design. It can seem like a lot of effort to learn both Quartus and Modelsim when you are beginning to learn the languages, however, they're both useful tools.  Cheers, Dave

[Altera_Forum]

Thanks for your advise but i can't sum two hex number.What should i do.Convert binary to decimal and then hexadecimal. Assume that i convert binary to hexadecimal how can i sum two hexadecimal number.There is 6 HEX in DE1-SoC but my sum can be 3digits

[Altera_Forum]

I need really some advise please help me :D

[Altera_Forum]

--- Quote Start ---  I need really some advise please help me :D  --- Quote End ---   You need to read a book on Verilog, and then write some code and simulate it in Modelsim.  What you are asking is directly supported by the language, i.e., the mathematical operation c = a + b. What you need to understand is how to specify a and b, what to do about the bit-growth of the sum, and how to create the enable logic around this sum.  So far you have not shown much effort, i.e., you have not shown any attempt at coding. Try harder please.  Cheers, Dave