What HDL is Altera's MegaCore Functions written in?

[Altera_Forum]

When I creating a MegaCore function you can choose VHDL, AHDL and Verilog but I want to know are these just wrappers around some HDL that implements the Megafunction? I've been told that all of Altera's Megafunctions are actually AHDL. Is that true? 

 thanks, joe

[Altera_Forum]

All of Altera's low level stuff is AHDL (just have a look in any db folder) but more complicated IP is often just a wrapper around whatever the IP core was written in. Not all IP is developped in house at Altera, but Altera themselves tend to write new stuff now in Verilog/SV

[Altera_Forum]

--- Quote Start ---  Is that true?   --- Quote End ---    No.  Increasingly they're just written in System Verilog I believe.  Nial

[Altera_Forum]

Where did you learn that they are being written in SystemVerilog? 

 Respectfully, joe