Hi All,While execution of the Analysis & Elaboration stage in the Quartus Prime (v16.1.2), I'm receiving the following message in the Messages Window: "Warning (125092): Tcl Script File ../../../../../../../../../drives/H/Electronics/FPGA/VHDL/lphud_fpga/arria_v_cores_lib/hdl/serdes_pll_rtl/serdes_pll_rtl_0002.qip not found " But I checked and found that this file physically exists in this directory. It seems that the problem is in the path to the file. So, I think to replace the relative path to the file to the absolute path. But I don't know what TCL script is executed while the Analysis & Elaboration stage... What script should be altered with the path to the file? Please help. Thank you!
The format of that path tells me that you are using a project that was archived as a .qar that, in its original location, pointed to that IP directory and the IP's .qip file. The message is referring to the .qip file as the script. The message is not generated by a script. Check the files that have been added to the project (Project menu -> Add/Remove Files in Project) and make sure the .qip in the correct location is listed there.