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YLi20
Beginner
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What is the format of A10 and jesd204b data? data mapping

jesd.bmpThe DAC38j82 I used

How does FPGA's IP core data format be arranged?

According to the instructions, when I send them, I arrange them in this way.

jesd204b_tx_link_data[127:0] = {I0,I1,I2,I3,I4,I5,I6,I7}

jesd204b_tx_link_data[127:0] = {Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7}

But this data maping is wrong.

 

I configure LMFS is 8212

Just like in the picture, is there an example of 8lane?

 

 

 

 

 

 

 

 

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