When using questa to simulate the "R-Tile PCI Express* Design Example", an error message was generat

[jinggee]

使用 questa 英特尔 FPGA Edition-64 2024.3 仿真“面向 PCI Express* 的 R-Tile Avalon® 流式英特尔 ® FPGA IP 设计示例”时，生成错误消息：致命：2000000 ns 仿真因不活动而停止！

[ventt]

Hi @jinggee,

Thanks for reaching out.

I want to replicate the error on my end. Could you please address the following items:

1. Share the .ip file that you used to generate the Design Example.
2. Share the steps you used to run the simulation.
3. What is the Quartus version used?

Thanks.

Best Regards,

Ven

[ventt]

Hi @jinggee,

I would like to follow up with you on my previous message.

Thanks.

Best Regards,

Ven

[ventt]

Hi @jinggee,

I hope you're doing well.

Could you please let me know if you have any updates?

Thanks.

Best Regards,

Ven

[ventt]

Hi @jinggee,

I am checking if your issue has been resolved.

Could you please get back to us on the items requested if you still require our support?

Thanks.

Best Regards,

Ven

[ventt]

Hi @jinggee,

We have not received a response from you regarding our previous reply. Please log in to ‘https://supporttickets.intel.com’, view details of the desired request, and post a feed/response within the next 15 days to allow me to continue to support you.

After 15 days, this thread will be transitioned to community support.

Community users will be able to assist you with your follow-up questions.

Thanks.

Best Regards,

Ven