Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16842 Discussions

Why does functional simulation generate Zs?

TNine
Beginner
1,251 Views

I have a very simple project, which sends a fixed packet over serial.

I share the files in this github repository

https://github.com/fabiodl/verilogutils/

 If I run a functional simulation (Waveform.vwf in the repository) I get some 'Z' in the value of an internal register, see the attached picture.

Nowhere in the code I set anything high impedance. Where is that Z originating from?

 

z.png

 

 

0 Kudos
1 Reply
JOHI
New Contributor II
520 Views

Hello,

Please check if your variables are initialised correctly.

(e.g. when declared)

Best Regards,

Johi.

 

0 Kudos
Reply