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Up to quartus ii lite 15.1, lpm_add_sub could be added to a .bdf diagram. But after that, lpm_add_sub could not be added. I just upgraded to quartus ii lite 19.1, same problem. But when I compiled a copy of my project that included this megafunction, the function was upgraded, and could be opened and edited in the megafunction wizard. So evidently lpm_add_sub still works in these later versions, but is just not available for insertion from the IP library.
Is there are reason for this, and can the function be restored to the library?
Thanks!
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Hi,
The lpm_add_sub does not greyed out in the Intel Quartus Prime Lite v19.1
Did you install all the devices during the software installation?
Thanks.
Best regards,
KhaiY
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Hi, I installed all devices. Then I right-clicked in the .bdf window, selected "insert symbol", and got following dialog:
Then I looked in the IP catalog:
I had previously imported an instance of lpm_add_sub from an earlier project made under quartus prime 15.1:
When I double-clicked this symbol, I got the wizard dialog:
The device assignment is 10M08SAU169C8G, although I have tried with several different MAX 10 devices, always with the same result. When I try the same with a Cyclone 10 device, the lpm_add_sub reappears:
I have a workaround (by importing an instance of lpm_add_sub as project ip) but it would be great if I could use it directly.
Thanks,
Joe
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Hmmm...my graphics disappeared when I sent. Here they are:
- insert symbol dialog:
- IP library dialog:
- add_sub instance from .bdf:
- MegaWizard dialog:
- insert symbol dialog with Cyclone 10 device assignment:
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Hi,
Upon checking, the lpm_add_sub is not supported in the Max 10 device. Please see the supported device families below:
Thanks.
Best regards,
khaIY
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Thanks for pointing this out. Is there a reason for this, since it was supported for MAX 10 up through version 15.1? Also, is there a substitute function for this? I suppose the best workaround is to keep using Quartus prime 15.1.
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Hi,
Yes. You are correct. If you want to continue using this IP, you have to stay with 15.1.
Besides this, there is an example for Verilog HDL: Adder/Subtractor
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/verilog/ver-add-sub.html
Thanks.
Best regards,
KhaiY
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The UG-01063 document ... https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_lpm_alt_mfug.pdf
says that lpm_add_sub is supported for Max 10 devices. Please clarify...
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