Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Working with quartus II simulator

Altera_Forum
Honored Contributor II
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Hi all, 

 

I have the following problem with quartus simulator: 

 

Some signals that are part of the .vwf file are not displayed in the simulation report. 

 

I am doing functionnal simulation. 

 

What is the reason for this trouble and how to make the signals viewable?? 

 

Sorry if the question has already been asked. 

 

Whitebird
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Altera_Forum
Honored Contributor II
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If you got a simulation warning message for those signals, it might tell you why the signals were not displayed. 

 

Did you use the Node Finder to insert the signals into the .vwf so that you can be certain you did not have a typo? 

 

I'm don't know for functional simulation in particular, but sometimes there is more than one form of the node name listed by the Node Finder. You might have to use a different form of the node name.
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Altera_Forum
Honored Contributor II
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Thank you for your advice Brad, 

 

You are right, for some signals there are alternative names (often with ~0 at the end of the name). Those alternative signals can be displayed. 

 

Yes I use the node finder. 

 

Whitebird
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Altera_Forum
Honored Contributor II
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Whitebird, 

 

I have often had this problem as well and until now, I was simply adding an output pin to the node I wanted to probe out. This way is the easiest one but have several drawbacks: lack of flexibility and above all, it can drasticaly change your timing performances. In fact, with additionnal output pins, the routing and fitting within the device can significantly be different from the same project wo/ those "probing" ouptut pins . This remarks apply to timing simulations only. 

 

Regarding functional simulations, nodes that are not connected to an input/output pin have their name either changed or downright supressed after synthesis ("synthesised away"). There are several logic options that can help you:  

1)Synthesis Logic Options: "Implement as Ouput of Logic Cell", "Preserve Registers", "Preserve Fan-out Free Register Node". 

2)Simulations Logic Options: "Add D and Q Ports of Register Node to Simulation Output Waveforms","Add to Simulation Output Waveforms". 

 

Depending on the type of signal you'd like to view (combinational output or register output), one or several of the above options can apply but the very first condition to use them is to apply them to a nodename known from the Analysis & Synthesis module: this is the point where it becomes a tricky business !...As the Qts II Help and Handbook are not very clear about this topic (see Vol.1/Chapt.7"QuartusII Integrated Synthesis"/"Node Naming Conventions", I just can tell you to find in your neighborhood a Qts II experimented user that will help to clarify this problem "in live and on the screen" or to convince your boss to pay you for an ALTERA training. 

 

A last remark: I think it's a pity that the node finder lists nodes that the simulator can't view ! May god or ALTERA change this a day... 

 

Let me know if you find the key of that problem which is part of the "Frequently Asked Questions" of this forum. It will help many QtsII users for sure ! 

 

Oliver
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