Hi guys,I've installed DE5ANET_E1_OpenCL_BSP_17.1 from Terasic and tried to compile vector_add example, but encountered an error (Attached). aoc -version Intel(R) FPGA SDK for OpenCL(TM), 64-Bit Offline Compiler Version 17.1.0 Build 240 Copyright (C) 2017 Intel Corporation quartus_map --version Quartus Prime Analysis & Synthesis Version 17.1.0 Build 240 10/25/2017 SJ Pro Edition Copyright (C) 2017 Intel Corporation. All rights reserved. Would very appreciate your help! Regards, Lancer
The process is failing due to some issue with importing the base design. This is either caused by a broken/incorrect BSP installation, or some issue with the BSP itself. Try reinstalling the BSP and rechecking your environmental variables. If the issue was not resolved, I recommend contacting Terasic.
Hi HRZ,Thank you for the reply! I did get a response claiming that they were able to reconstruct the bug in CentOS 7. They estimate that an updated BSP will be available in about two weeks.