The area report should give you a good idea of how much of the FPGA RAMs will get used up. Really this depends on your FPGA device. An SV-A7 has 50 Mb (b as in bits), some are already used by the board design, some by your kernel pipeline. If you really need something that big, I'd say start with half your device's bits.
Note, the constant cache suffers from very steep miss penalties. You should really only use it for data that rarely (or never) gets evicted.
