declaration in vhdl

[Altera_Forum]

plese help me in debugging this error in vhdl 

my code contains the following statement fifo_out_port : OUT ARRAY8x8;  and it gives the following error Error (10482): VHDL error at output_fifo.vhd(43): object "ARRAY8x8" is used but not declared  help me in declaring this in in my package

[Altera_Forum]

I don't know what base type you need, but declaring an array is done like this: 

 type my_array_t is array(integer range <>) of some_other_type;