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differential signals on pins - schematic assignment

Altera_Forum
Honored Contributor II
‎08-15-2012 02:57 PM
1,037 Views

On the schematic I have an input named clock. In reality this should be a differential signal. Meaning, I should assign two pins instead of one. 

Likewise, I have LVDS outputs coming from an LVDS Megafunction. These are also single signals on the schematic. And they should have differential pins assigned. 

The Pin Planner somehow is not supporting this...
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Altera_Forum
Honored Contributor II
‎08-16-2012 05:32 AM
339 Views

As in HDL design descriptions, you'll connect the positive pin only in the schematic. The negative pin is assigned automatically by selecting a differential IO standard.

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Altera_Forum
Honored Contributor II
‎08-16-2012 06:57 AM
339 Views

Thanks, that is somewhat counter intuitive and should be mentioned on a prominent place.

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