error with using a macro

[Altera_Forum]

Hello, 

 Example with a_74283.  LIBRARY altera; USE altera.maxplus2.all;  LIBRARY ieee; USE ieee.std_logic_1164.all;  ENTITY macro_eg IS PORT ( num_a :IN STD_LOGIC_VECTOR (4 DOWNTO 1); num_b :IN STD_LOGIC_VECTOR (4 DOWNTO 1); carry_in :IN STD_LOGIC; carry_out :OUT STD_LOGIC; sum_out :OUT STD_LOGIC_VECTOR (4 DOWNTO 1) ); END macro_eg;  ARCHITECTURE adder OF macro_eg IS COMPONENT a_74283  PORT  (  a :IN STD_LOGIC_VECTOR (4 DOWNTO 1);  b :IN STD_LOGIC_VECTOR (4 DOWNTO 1);  cin :IN STD_LOGIC;  cout :OUT STD_LOGIC;  sum :OUT STD_LOGIC_VECTOR (4 DOWNTO 1)  ); END COMPONENT; BEGIN add1 : a_74283 PORT MAP (a => num_a, b => num_b, cin => carry_in, cout => carry_out, sum => sum_out); END;  but I get, Error: Node instance add1 instantiates undefined entity a_74283 . I have the same problem with using a User Defined macro (I just include/add the folder of the VHDL program that is going to be used as the macro in the User Libraries). I have no problem/errors using macros in AHDL (using the INCLUDE keyword).  Thank you

[Altera_Forum]

Ther are no macros in VHDL. 

Have you including the source code for a_74283 in the project, or have you included the correct library?

[Altera_Forum]

I only added the: 

LIBRARY altera; USE altera.maxplus2.all; in my program, as the a_74283 component is in the maxplus2.vhd file under maxplus2\vhdl93\altera folder (there from installation of MAX+plus II). I am not sure exactly where the source code for the a_74283 component is situated (from the install of MAX+plus II)?

[Altera_Forum]

I would have thought maxplus2 should know where its own libraries are. But the error you have is an error of missing source code. 

 ANy reason you're using maxplus2? its a very old program.

[Altera_Forum]

I am trying to teach myself FPLDs in AHDL, VHDL and Verilog. 

The Technikon I attended added an FPLD course (in Graphic Design Entry, AHDL & VHDL) after I graduated, so I bought the kit from the lecturer (a while back). I have only recently started with it. The FPLD (EPM7032SLC44-10) is also obsolete. But because I am working from course notes and MAX+plus II is still available, I am using it as a beginner.  Back to the problem: I also get the error for using a user macro/component. I use a previous exercise as a component; I add the folder of the exercise (component to use) in User Libraries. Following is the program (exercise) using exercise 1v as a component:  -- Exercise 14v: A 4-Bit Up Counter Using a Macro as the 7-Segment Display Decoder  ENTITY Ex14v IS  PORT  (  clk :IN BIT;  SSout :OUT INTEGER RANGE 127 DOWNTO 0  ); END Ex14v;  ARCHITECTURE usermacro OF Ex14v IS  SIGNAL cnt :INTEGER RANGE 15 DOWNTO 0;   COMPONENT ex1v IS  PORT  (  bn :IN INTEGER RANGE 15 DOWNTO 0;  SS :OUT INTEGER RANGE 127 DOWNTO 0  );  END COMPONENT;  BEGIN  PROCESS  BEGIN  WAIT UNTIL clk'EVENT AND clk = '1';  cnt <= cnt + 1;  END PROCESS;  decoder :ex1v PORT MAP (cnt,SSout); END;  Following is exercise 1v program: -- Exercise 1v: A 4-Bit Binary to 7-Segment Decoder  ENTITY Ex1v IS  PORT (  bn :IN INTEGER RANGE 15 DOWNTO 0;  SS :OUT INTEGER RANGE 127 DOWNTO 0  ); END Ex1v;  ARCHITECTURE max OF Ex1v IS BEGIN   SS <= 2#111_1110# WHEN bn = 0 ELSE -- Binary, Decimal  2#011_0000# WHEN bn = 1 ELSE  2#110_1101# WHEN bn = 2 ELSE  2#111_1001# WHEN bn = 3 ELSE  2#011_0011# WHEN bn = 4 ELSE  2#101_1011# WHEN bn = 5 ELSE  2#101_1111# WHEN bn = 6 ELSE  2#111_0000# WHEN bn = 7 ELSE  2#111_1111# WHEN bn = 8 ELSE  2#111_1011# WHEN bn = 9 ELSE  2#111_0111# WHEN bn = 10 ELSE  2#001_1111# WHEN bn = 11 ELSE  2#100_1110# WHEN bn = 16#C# ELSE -- Binary, Hexadecimal  2#011_1101# WHEN bn = 16#D# ELSE  2#100_1111# WHEN bn = 16#E# ELSE  2#100_0111# WHEN bn = 16#F#; END;  Adding the folder: Options -> User Libraries... -> ..\ex1v (folder containing exercise 1v files) -> Add -> OK

[Altera_Forum]

I highly suggest getting a newer dev kit. You can get the cheapest from altera for $50 and you will be able to use the most recent version of quartus. I highly suggest ditching what you have. You're not really learning anything.