guarded block doesn't work

[Altera_Forum]

Hi there! I have an odd problem. I have to implement in VHDL a Demultiplexor 1:8, using guarded blocks. When I simulate in Active-HDL it's seems that all of the guard conditions are true so it doesn't works like a demultiplexor. here is the code:  

-------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.all;   entity demux is  port (entry,s1,s2,s3:in bit;  y: out bit_vector (7 downto 0)); end demux;   -------------------------------------   architecture arch of demux is begin    out0:block ( s1='0' and s2='0' and s3='0' )  begin  Y(0)<=entry;  end block;     out1:block ( s1='1' and s2='0' and s3='0' )  begin  Y(1)<=entry;  end block;    out2:block ( s1='0' and s2='1' and s3='0' )  begin  Y(2)<=entry;  end block;    out3:block ( s1='1' and s2='1' and s3='0' )  begin  Y(3)<=entry;  end block;    out4:block ( s1='0' and s2='0' and s3='1' )  begin  Y(4)<=entry;  end block;    out5:block ( s1='1' and s2='0' and s3='1' )  begin  Y(5)<=entry;  end block;    out6:block ( s1='0' and s2='1' and s3='1' )  begin  Y(6)<=entry;  end block;    out7:block ( s1='1' and s2='1' and s3='1' )  begin  Y(7)<=entry;  end block;   end arch;  ---------------------------------  please run it. Thank you!

[Altera_Forum]

When you say you have to use guarded blocks, do you really have to? Its something that I have never ever used, and never ever seen used. Even in my doulos golden reference guide (which I, and many others, use as my most important VHDL reference) says  

   --- Quote Start ---   Synthesis: "Most commercial synthesis tools do not support blocks. Use processes instead"  Tips: "It is not necessary to learn and use blocks and related syntax suych as guarded signal assignments. It is generally more efficent for simulation to use processes instead."   --- Quote End ---    From what I understand from my reference, and looking at your code, you should be writing:  Y(N) <= guarded entry;   But I am probably wrong, and I dont think you'll be able to get much help on this forum.

[Altera_Forum]

Thank you. I'm at the begining and your replay was very useful. I will read The VHDL Golder Reference Guide!

[Altera_Forum]

The Doulos golden reference guide is really for those already familiar with VHDL. You need a good VHDL tutorial. 

Where did you learn how to use blocks?

[Altera_Forum]

I'm studying at the university. I wanted to use blocks because in our laboratory guide is an exercise that says:"Make a demultiplexer 1 to 8 using logic gates and for every logic gate use a block"(in my opinion it's a primitive way to make a demultiplexer in VHDL). Anyway, the point is that even if I've made a demultiplexer weeks ago using a process, I want to understand more of the concurrent domain, soo I'm testing stuff. I find the golden reference guide very useful and much more practical than our laboratory guide