Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Altera_Forum
Honored Contributor I
2,361 Views

helloworld issue on arria10Gx development kit

Hi, 

I am trying to compile and run hello_world example of OpenCL SDK on Arria10Gx development board. Example fails to run with below error code. kindly check below steps and comment on any wrong doing. 

 

 

user@user:~/opencl_examples/hello_world$ bin/host  

Querying platform for info: 

========================== 

CL_PLATFORM_NAME = Intel(R) OpenCL 

CL_PLATFORM_VENDOR = Intel(R) Corporation 

CL_PLATFORM_VERSION = OpenCL 2.0  

 

 

Querying device for info: 

======================== 

CL_DEVICE_NAME = Intel(R) Core(TM) i7-6800K CPU @ 3.40GHz 

CL_DEVICE_VENDOR = Intel(R) Corporation 

CL_DEVICE_VENDOR_ID = 32902 

CL_DEVICE_VERSION = OpenCL 2.0 (Build 475) 

CL_DRIVER_VERSION = 1.2.0.475 

CL_DEVICE_ADDRESS_BITS = 64 

CL_DEVICE_AVAILABLE = true 

CL_DEVICE_ENDIAN_LITTLE = true 

CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 262144 

CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 64 

CL_DEVICE_GLOBAL_MEM_SIZE = 16734322688 

CL_DEVICE_IMAGE_SUPPORT = true 

CL_DEVICE_LOCAL_MEM_SIZE = 32768 

CL_DEVICE_MAX_CLOCK_FREQUENCY = 3400 

CL_DEVICE_MAX_COMPUTE_UNITS = 12 

CL_DEVICE_MAX_CONSTANT_ARGS = 480 

CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 131072 

CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 

CL_DEVICE_MEM_BASE_ADDR_ALIGN = 1024 

CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 128 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 1 

Command queue out of order? = true 

Command queue profiling enabled? = true 

Using AOCX: hello_world.aocx 

Context callback: clCreateProgramWithBinary failed 

ERROR: CL_INVALID_BINARY  

Location: ../common/src/AOCLUtils/opencl.cpp:392 

Failed to create program with binary 

 

 

============================================================== 

 

 

Steps I followed are : 

------------------------ 

1. Installed and setup Intel OpenCL SDK for FPGA. 

2. Configured Arria10Gx development kit as per instructions specified in document  

https://www.altera.com/en_us/pdfs/literature/an/an807.pdf 

3. compiled OpenCL kernel with below command and generated hello_world.aocx file. 

aoc device/hello_world.cl -o bin/hello_world.aocx -board a10gx 

4. compiled host program with make command 

5. used "bin/host" command to run host program. 

 

 

Also here is the info about detected devices  

user@user:~/opencl_examples/hello_world$ aoc -list-boards 

Board list: 

a10gx 

Board Package: /home/mobiliya/intelFPGA_pro/17.1/hld/board/a10_ref 

 

 

a10gx_hostch 

Board Package: /home/mobiliya/intelFPGA_pro/17.1/hld/board/a10_ref 

Channels: host_to_dev, dev_to_host 

 

 

Thanks. 

regards 

Vinod
0 Kudos
26 Replies
Altera_Forum
Honored Contributor I
94 Views

See to opencl.cpp, line 392. In my version is code: 

checkError(status, "Failed to create program with binary"); 

for a previous function call of clCreateProgramWithBinary(). 

May be, in FPGA on Power On is downloaded not OpenCL image with BSP, search appropriate .sof or .rbf. 

In kit by default lie non-OpenCL image.
Altera_Forum
Honored Contributor I
94 Views

You are compiling your host code against the wrong OpenCL SDK; the host code is trying to run the OpenCL kernel on your CPU (CL_DEVICE_NAME = Intel(R) Core(TM) i7-6800K CPU @ 3.40), rather than your FPGA.

Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

You are compiling your host code against the wrong OpenCL SDK; the host code is trying to run the OpenCL kernel on your CPU (CL_DEVICE_NAME = Intel(R) Core(TM) i7-6800K CPU @ 3.40), rather than your FPGA. 

--- Quote End ---  

 

 

Thanks for the response. 

 

I compiled helloworld example as per readme file.  

aoc -march=emulator device/hello_world.cl -o bin/hello_world.aocx -board=a10gx 

 

and ran host code by using "bin/host". Did I missed any device/target setting??
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

See to opencl.cpp, line 392. In my version is code: 

checkError(status, "Failed to create program with binary"); 

for a previous function call of clCreateProgramWithBinary(). 

May be, in FPGA on Power On is downloaded not OpenCL image with BSP, search appropriate .sof or .rbf. 

In kit by default lie non-OpenCL image. 

--- Quote End ---  

 

 

I have configured development kit for openCL image by following the steps mentioned in  

https://www.altera.com/en_us/pdfs/literature/an/an807.pdf  

 

Above document does not mention any BSP. Did i missed any thing in board setup??
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

You are compiling your host code against the wrong OpenCL SDK; the host code is trying to run the OpenCL kernel on your CPU (CL_DEVICE_NAME = Intel(R) Core(TM) i7-6800K CPU @ 3.40), rather than your FPGA. 

--- Quote End ---  

 

 

"aoc --list-boards" command lists below boards 

Board list: 

a10gx 

Board Package: /home/mobiliya/intelFPGA_pro/17.1/hld/board/a10_ref 

 

a10gx_hostch 

Board Package: /home/mobiliya/intelFPGA_pro/17.1/hld/board/a10_ref 

Channels: host_to_dev, dev_to_host 

 

However api getDevices() in file main.cpp lists only host, any idea why?? 

Device 0: Intel(R) Core(TM) i7-6800K CPU @ 3.40GHz
Altera_Forum
Honored Contributor I
94 Views

Try to uninstall your SDK an install again, listen to HRZ, he say that your HelloWorld is runned on Intel processor. 

May be another OpenCL SDK (not for FPGA) be installed on your PC ? 

In debugger DS-5 step by step you may see executing of your HW ? 

On init may be returned not 1 OpenCL realization, and on default index [0] is used non-FPGA. I see this on PC with installed NVidia GPU card and SDK for GPU. 

My Altera kit on Cyclone V say from embedded Linux: 

CL_DEVICE_NAME = c5soc : Cyclone V SoC Development kit 

Your must see similar line with "a10_ref", no "CL_DEVICE_NAME = Intel(R) Core(TM) i7-6800K CPU @ 3.40GHz".
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

Thanks for the response. 

 

I compiled helloworld example as per readme file.  

aoc -march=emulator device/hello_world.cl -o bin/hello_world.aocx -board=a10gx 

 

and ran host code by using "bin/host". Did I missed any device/target setting?? 

--- Quote End ---  

 

 

"-march=emulator" compiles for emulation. Are you trying to run the code on an actual board, or are you trying to emulate it? If you are trying to run on a board, you should remove "-march=emulator" from your command line.
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

"-march=emulator" compiles for emulation. Are you trying to run the code on an actual board, or are you trying to emulate it? If you are trying to run on a board, you should remove "-march=emulator" from your command line. 

--- Quote End ---  

 

Oh! Sorry. Its my typo error here. Actually I compiled for actual board without "-march=emulator". i.e  

 

aoc device/hello_world.cl -o bin/hello_world.aocx -board=a10gx 

Altera_Forum
Honored Contributor I
94 Views

Then there must be something wrong with your environmental variables somewhere. If the compiled host code is detecting your CPU, but not your FPGA, it means it is being compiled against some SDK other than Altera's, or that your FPGA is not being detected and hence, the host code is using the CPU. Have you made sure your board is detected correctly? e.g. does your board pass "aocl diagnose"?

Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

Then there must be something wrong with your environmental variables somewhere. If the compiled host code is detecting your CPU, but not your FPGA, it means it is being compiled against some SDK other than Altera's, or that your FPGA is not being detected and hence, the host code is using the CPU. Have you made sure your board is detected correctly? e.g. does your board pass "aocl diagnose"? 

--- Quote End ---  

 

 

I did clean installation of both Ubuntu16.4LTS and Quartus Prime Pro 17.1.0 on my system. 

 

 

But now seeing below issue for both "helloworld" and "vect_add" sample application. 

 

mobiliya@mobiliya:~/opencl_examples/vectoradd/vector_add$ bin/host  

Initializing OpenCL 

ERROR: UNRECOGNIZED ERROR CODE (-1001) 

Location: ../common/src/AOCLUtils/opencl.cpp:297 

Query for number of platforms failed 

 

Kindly note that all environment variables and Aletra Arria10Gx board settings are fine as described in earlier mails. Also both "aocl diagnose" and "lspci" commands work as expected.
Altera_Forum
Honored Contributor I
94 Views

Copy "*Quartus_Dir*/hld/Altera.icd" to "/etc/OpenCL/vendors/".

Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

Copy "*Quartus_Dir*/hld/Altera.icd" to "/etc/OpenCL/vendors/". 

--- Quote End ---  

 

 

Thanks. With this I am able to run hello_world sample application with below error.  

Querying platform for info: 

========================== 

CL_PLATFORM_NAME = Intel(R) FPGA SDK for OpenCL(TM) 

CL_PLATFORM_VENDOR = Intel(R) Corporation 

CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), Version 17.1 

 

 

Querying device for info: 

======================== 

CL_DEVICE_NAME = a10gx : Arria 10 Reference Platform (acla10_ref0) 

CL_DEVICE_VENDOR = Intel(R) Corporation 

CL_DEVICE_VENDOR_ID = 4466 

CL_DEVICE_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), Version 17.1 

CL_DRIVER_VERSION = 17.1 

CL_DEVICE_ADDRESS_BITS = 64 

CL_DEVICE_AVAILABLE = true 

CL_DEVICE_ENDIAN_LITTLE = true 

CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768 

CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0 

CL_DEVICE_GLOBAL_MEM_SIZE = 2147483648 

CL_DEVICE_IMAGE_SUPPORT = true 

CL_DEVICE_LOCAL_MEM_SIZE = 16384 

CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000 

CL_DEVICE_MAX_COMPUTE_UNITS = 1 

CL_DEVICE_MAX_CONSTANT_ARGS = 8 

CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 536870912 

CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 

CL_DEVICE_MEM_BASE_ADDR_ALIGN = 8192 

CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 1024 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 

CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0 

Command queue out of order? = false 

Command queue profiling enabled? = true 

Using AOCX: hello_world.aocx 

MMD INFO : [acla10_ref0] PR base and import compile IDs do not match 

MMD INFO : [acla10_ref0] PR base ID currently configured is 0x47e4097c 

MMD INFO : [acla10_ref0] PR import compile expects ID to be 0x2ca189ab 

MMD INFO : [acla10_ref0] Falling back to JTAG programming instead of PR 

MMD INFO : Autodetect Cable not found!! 

MMD INFO : setting Cable to default value 1 

MMD INFO : setting Device Index to default value 1 

MMD INFO : executing "quartus_pgm -c 1 -m jtag -o "P;reprogram_temp.sof@1"" 

Error (213013): Programming hardware cable not detected 

Error (213013): Programming hardware cable not detected 

Error (213013): Programming hardware cable not detected 

mmd program_device: Board reprogram failed 

 

 

Kernel initialization is complete. 

Launching the kernel... 

 

 

 

 

MMD FATAL: acl_pcie.cpp:71: can't find handle -1 -- aborting 

 

host: acl_pcie.cpp:71: ACL_PCIE_DEVICE* get_pcie_device(int): Assertion `0' failed.
Altera_Forum
Honored Contributor I
94 Views

Connect your board to the machine using the JTAG cable and retry.

Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

Connect your board to the machine using the JTAG cable and retry. 

--- Quote End ---  

 

 

You mean both PCIe and Jtag need to be connected
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

You mean both PCIe and Jtag need to be connected 

--- Quote End ---  

 

 

Yes. Sometimes PCI-E-based reconfiguration fails and it that case, the runtime switches to JTAG-based reconfiguration.
Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

Yes. Sometimes PCI-E-based reconfiguration fails and it that case, the runtime switches to JTAG-based reconfiguration. 

--- Quote End ---  

 

I have connected micro USB cable between board and Host machine, but seeing same error. Does this work with On-Board USB-Blaster interface? FYI after updating Arria10 board with "a10_ref_initialization.tgz " package, "lsusb" command on host does not list any Jtag interface. 

 

We have not received any Jtag interface/debugger. With Arria10 development kit we only received Linear technology's DC1613A USB - I2C/SMBus/PMBus connector.
Altera_Forum
Honored Contributor I
94 Views

If you could initially program the FPGA with your cable, then the OpenCL runtime should also be able to do so. Try running "quartus_pgm -a". If your board is listed, it should work. If not, kill the jtagd service and then run "quartus_pgm -a" as root. It is important that the command is ran as root for the first time after machine boot or else, the cable will not be detected. After that, the cable will be detected regardless of which user is running the command.

Altera_Forum
Honored Contributor I
94 Views

 

--- Quote Start ---  

If you could initially program the FPGA with your cable, then the OpenCL runtime should also be able to do so. Try running "quartus_pgm -a". If your board is listed, it should work. If not, kill the jtagd service and then run "quartus_pgm -a" as root. It is important that the command is ran as root for the first time after machine boot or else, the cable will not be detected. After that, the cable will be detected regardless of which user is running the command. 

--- Quote End ---  

 

 

No. JTAG interface not detected. Tried "sudo killall jtagd" followed by "sudo quartus_pgm -a" after reboot.
Altera_Forum
Honored Contributor I
94 Views

Well, I don't think there are any other solutions to your problem. PCI-E-based reconfiguration on Arria 10 is extremely unstable and you will be forced to use JTAG-based reconfiguration from time to time; in fact, the process is so unstable that it fails with a 50% chance on my machine, crashing the machine every time. Personally, I have completely switched to JTAG-based reconfiguration.