Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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how the way to optimization the quartus

Honored Contributor II

dear all 

for many reasons ,I find the quartus II complier is more time than xilinx,and for one time i used for can you give me some advice to reduce the complier time? 

for i have used : 

1,setting--->compilation process 

2,processing--->start---->start incremental fitter 


and what for u use?
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Honored Contributor II

What version of QII are you using? The incremental fitter option hasn't been around for a while... I suggest upgrading to the latest version (currently 7.0) because I've seen a lot of compile time improvements in recent versions. 


There's now an Incremental Compilation feature, where you can split up your design into blocks called design partitions, and then if you change logic in one partition you can preserve the fitter results (and performance) for the rest of the partitions. This can be a big way to reduce your compile time! There's a bunch of Altera documentation on it... Check out the support "resource center" that can point you to demos & training etc: 


There's also a section about reducing compilation time in the optimization handbook chapter that gives some other ideas: Starts on page 80 in the current 7.0.0 version.
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