Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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how to use the TimeQuest to constrain the clock skew

Altera_Forum
Honored Contributor II
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In the Classic Timing Analyzer,these is a constrain named "Maximum Clock Arrival Skew",but it is not supported in the Quartus II TimeQuest Timing Analyzer,how to i do to constrain the clock skew in the Timequest? 

THX!
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Altera_Forum
Honored Contributor II
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The SDC command for clock skew is 

 

set_clock_uncertainty <your_uncertainty> <clock>  

 

I might have the syntax wrong, but that's the name of the command. 

 

You can add this to the sdc file that timequest generates, then next time you open timequest and it reads the file it will load the setting.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

The SDC command for clock skew is 

 

set_clock_uncertainty <your_uncertainty> <clock> I might have the syntax wrong, but that's the name of the command. 

 

You can add this to the sdc file that timequest generates, then next time you open timequest and it reads the file it will load the setting. 

--- Quote End ---  

 

i will try it,thank a lot!
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Altera_Forum
Honored Contributor II
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While some causes of clock skew can add to clock uncertainty, set_clock_uncertainty is not a command to constrain clock skew. The on-line help page for the command does mention skew, but what the command actually does is tell TimeQuest how far the clock edge can move away from the ideal position (for example, a clock edge moving around because of jitter).

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