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running ip-setup-simulation to create a top level set of sim files, fails with a lot of these messages
Error: 2022.02.10.10:43:27 Error: SPD file C:/final/xxxxx/alt_clk_for_cdr\alt_clk_for_cdr.spd not found. Please generate simulation files for IP file C:/final/xxxxx/alt_clk_for_cdr.ip before generating simulator setup scripts.
i have no ability to actually create sim scripts for all thee IP blocks ( some are part of a JESD example project and some are custom ip componets I've written )
i dont actually want to simulate any of the chunk that fail as they are mainly part of a PCIe backend that i can emulate in a different way for the purposes of test benches
how do i work around this?
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Hi @AndyRea
Which Quartus version (standard /pro) and device are you using?
Before Generate Simulator Setup Script for IP ( ip-setup-simulation utility at the command-line), have you Generate HDL for the Intel IP or qsys files?
You may checkout the section below for further details.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Hi @AndyRea
I have yet to receive any response from you to the previous question/reply/answer that I have provided but I believed that I have answered your question.
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

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