need help on assembling the verilog modules on altera cyclone II de2

[Altera_Forum]

I am new to FPGA design. However, I have acquired all the modules that i need such as 'ampmain.v', 'signal_generator.v', 'display_generator.v', 'character generator', 'control_nios.sopc'. I have been trying to assemble these modules on altera cyclone 2 de2 board but i am not able to do so. i've been reading some tutorials as well but due to the lack of time i decided to post for any help here. it is supposed to work as an oscilloscope which somebody had already did. it also has 'main_amp.c' which i suppose is used to display it on vga using nios II. the codes are working fine however i am not sure how do i put all the moduels together and the main_amp.c and program the board. i dont know what to do with the control_nios.sopc file. Anybody with some experience can help me out here. Please any help is welcome. thank you

[Altera_Forum]

well writing those modules, putting them together and running it is a huge process and requires three programs: 

 1) Altera SOPC designer to design the microcontroller. 2) Altera Quartus II to implement the processor and the other related modules on the fpga 3) Nios II IDE(eclipse) to program the micrcontroller  since you already have the sopc design.. what you can try to do is add all those files to a quartus project(Project->Add/Remove files from project) and connect them as neccesary in the block diagram editor (New->Block diagram file) program it onto the fpga and then use nios IDE to write the c program (main_amp.c) and run it on the micontroller in the FPGA.  but all of this is gonna require a certain level of knowledge and experience and wont be easy for a first time user to get it right at once.. Altera softcore microcontroller is quite a complicated system.  so i suggest you read up on these software and start from scratch. because even if you bring all of these together theres no gurantee it'll work cause all of these components need to work with perfect harmony.

[Altera_Forum]

Thanks for the quick reply

[Altera_Forum]

i followed the steps

[Altera_Forum]

....as you mentioned

[Altera_Forum]

however i am still stuck

[Altera_Forum]

finally 5 posts. Thanks normad for replying. 

I did what u told me to do. Here are the steps that I followed:    (1) First I created a new project on Quartus II 9.1.  I gave my project name as ‘test1’. Then I clicked next and I added all the verilog modules files with .v extension along with the ‘control_nios.sopc’. I clicked finish then I can see all these files in the project explorer window. I assigned ‘ampmain.v’ as the top level module. Then I double clicked the ‘control_nios.sopc’ which gave me SOPC builder application window as seen here   http://i951.photobucket.com/albums/ad351/ajective/firststep.jpg    Then I click generate at the bottom of the window, it take some time to process then gave me this  http://i951.photobucket.com/albums/ad351/ajective/generate.jpg    (2) Then I opened the NIOS II eclipse platform. I did  File > New > NIOS application  Gave the name test1 for the project.   http://i951.photobucket.com/albums/ad351/ajective/23.jpg   At the bottom of BSP location I clicked the button ‘create’ which gave me this window  http://i951.photobucket.com/albums/ad351/ajective/create.jpg   Then I gave the project name ‘test12’ since I couldn’t give it the name ‘test1’. Then I clicked the SOPC information filename button and browse to     c:\altera\91\nios2eds\examples\verilog\nios_ii_cycolone2_2c35\standard\NiosII_cycloneII_2c35_standard_sopc.sopcinfo    And clicked open   http://i951.photobucket.com/albums/ad351/ajective/sopc.jpg    Then I right clicked test1 > build project  Then right clicked  http://i951.photobucket.com/albums/ad351/ajective/mainprojec.jpg   test1> Run as> NIOS II Hardware.    I got into the another window. The run button was disables and I could see the   ‘cross’ mark on ‘Target Connection’ tab  http://i951.photobucket.com/albums/ad351/ajective/runconfig-1.jpg   I then opened the programmer from   NIOS II> Quartus II Programmer. On the add file I browsed to    c:\altera\91\nios2eds\examples\verilog\nios_ii_cycolone2_2c35\standard\ NiosII_cycloneII_2c35_standard.sof   and open. Then I clicked start. The LEDs stopped flashing and I got 100%succesful on top of the programmer. I thought I reason I saw the cross icon on the target location was because I didn’t do this step. I went back to NIOS II and redo Run as > NIOS II Hardware I still see the same thing. I am stuck here and I would really appreciate it if anyone can help me out.

[Altera_Forum]

After the succesful project generation on SOPC builder. I went to the programmer where I can see the file to program. I clicked start and I got 100% successful.  

 Then on NIOS II, I build new project and selected the control_nios.ptf file as build earlier by SOPC builder. I had created the 'newtest.c' and try to build it. It build succesfully with no errors. However, I didn't see any .elf file on debug filder which is required to run on NIOS II hardware. I don't know what is the problem. I tried to rebuild it, clean project and rebuild. No use. At this point I tried to Run as> Nios II hardware. It gave me an error saying "NIOS II elf file doesnt exist".   My guess is I have some problem with control_nios.ptf file. But I don't know how to approach it at this point.  Here is the complete verilog and c files that i am using for this project. I would really appreciate it for any help..  http://www.megaupload.com/?d=gx7ogu40