Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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problem with changing pin assignments

Altera_Forum
Honored Contributor II
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Hi, 

 

I almost finished my FPGA & board design .  

I wanted to add the possibilities to use CRC error check and dev_clr.  

the pins dedicated for those functions are already being used for other purpose ( I used back annotation so the pin assignments are fixed) . when I tried to change the pin assignments to other pins , the compilation failed . 

why is that ? how can I fix it ? 

 

thanks...
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

the compilation failed 

--- Quote End ---  

 

failed how? (with which error message?)
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Altera_Forum
Honored Contributor II
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the error massage is: 

 

Error: Can't place multiple pins assigned to pin location Pin_E19 (IOPAD_X17_Y74_N0) 

Info: Pin RO_in[97] is assigned to pin location Pin_E19 (IOPAD_X17_Y74_N0) 

Info: Pin ~ALTERA_CRC_ERROR~ is assigned to pin location Pin_E19 (IOPAD_X17_Y74_N0) 

 

it looks like it doesn't Remember that I changed the pin assignments .  

How do I fix that?
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Altera_Forum
Honored Contributor II
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The error message says that you have a user pin "RO_in[97]" assigned to the location of CRC output.

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Altera_Forum
Honored Contributor II
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I know... 

 

But even after I changed it manually in the pin planer( I assigned RO_in[97] to pin E18 ), when I compile it ,the compiler ignores the change I made .
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Altera_Forum
Honored Contributor II
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Sometimes the pin planner operation is a bit arbitrary. I don't know what's exactly going on in your design but you usually have unlimited control in the assignment editor. You can also temporarily remove the said pin from the top entity port. 

 

It's possibly annoying, but a trivial issue, though.
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Altera_Forum
Honored Contributor II
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Or remove the unwanted assignment from qsf

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Altera_Forum
Honored Contributor II
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update: 

 

I tried to delete the signal and then I added it back ( after compilation) and it worked... thanks
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Altera_Forum
Honored Contributor II
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Hi  

 

I exactly have the same problem can you please tell me  

exactly step by step tell me how you solved this problem? 

 

Error: Can't place multiple pins assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

Info: Pin Txd is assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

Info: Pin ~ALTERA_NCEO~ is assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

 

I would appreciate your advices
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Altera_Forum
Honored Contributor II
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Hi, 

 

I did a long time ago , but I think that what i did is: 

 

I deleted the assignment from the top level entity 

compiled the program  

I put it back in the top level entity. 

 

you may just change the names of the signals , maybe it'll also work .
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Altera_Forum
Honored Contributor II
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hi, 

 

just want to share my finding: based on your info below: 

 

Error: Can't place multiple pins assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

Info: Pin Txd is assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

Info: Pin ~ALTERA_NCEO~ is assigned to pin location Pin_N5 (IOPAD_X10_Y0_N0) 

 

if you take a look at the pin-out table for the device you are using. Mine if EP4CGX15, you can find programming pin NCEO is using the pin_N5. In order to to make this pin dual purpose pin and free up this pin after the programming purpose. You can do the follow: 

 

1. Open your Quartus Project. from the Quartus menu, Select Assingments -> Devices.... 

2. Click Device and pin Options... button 

3. Select Dual-Purpose Pins from the Category column 

4. Under Dual-purpose pins: column, selct the NCEO as Use as regular I/O  

 

That's it. recompile your project, it should work this time. :):):)
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