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hi,
iam using quartus prime 16.0 in my module ,,i got 3 signals in conduit interface and iam declaring 3 of them as(signal type) "export" ..but then following error is coming.. "" Error: There are multiple signals with role "export". Components using hw.tcl package 14.0 and greater must specify unique signal roles. while executing "add_interface_port conduit_end slower export Input 1" "" then i rename the 3 signals to export1, export2, export3 then the error is gone but when i generate HDL file "" Error (12002): Port "delay_ctrl_delay" does not exist in macrofunction "soc" Error (12002): Port "delay_ctrl_faster" does not exist in macrofunction "soc" Error (12002): Port "delay_ctrl_slower" does not exist in macrofunction "soc" "" which is i declared earlier in conduit...so this is the problem with conduit interface decleartion.. when i try to edit the module i declared in qsys there is only one signal in conduit interface anybody know how to remove this particular problem. any help is really appreciated thanks and regards update .............. i am using cyclone 5 fpga (de0_nano_soc)... and cyclone v hard processor as hps update>>> hi, i used quartus 13.1 instead of quartus prime and its working fine.. all the signals in conduit interface has siganl type "export". so anybody know what the problem with quartus prime?? thanks and regardsLink Copied
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Hello. I know exactly where you got this error. I've just gotten it myself working through the tutorial from here http://zhehaomao.com/blog/fpga/2013/12/27/sockit-3.html . I'm using Quartus Prime 15.1. I read through the manual ftp://ftp.altera.com/up/pub/altera_material/15.1/tutorials/making_qsys_components.pdf in order to get an understanding of how Qsys had changed from 13 to 15 with regards to interfaces and conduits. It all went well until I attempted analysis & compilation then I got those exact same errors. The way that Qsys has merged the signals and interfaces to one tab for the creation of custom components is where the error originates. When you are told to set the signal type to export you instead have to add the interface "conduit" and then drag and drop the signals into it after that when you click on the signals under the conduit and change their "signal type" the name you enter in the signal type box gets appended to the signal export name. For instance I set the delay_ctrl delay port to export2 and found that the exported port was named delay_ctrl_export2 . The exported port names can be found in the soc_system.v file that Qsys generated for you. So for example if you wanted to use the original sockit_test.v top level file from the tutorial linked above without modifying it you would simply set the signal type to delay, slower and faster respectively in Qsys after you've moved the signals to the conduit. I hope this helps you and anyone else who comes across this.
Regards, Matthew.- Mark as New
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Hi Matthew, I have the same problem and have not found any solution yet. I don't get this part:
"When you are told to set the signal type to export you instead have to add the interface "conduit" and then drag and drop the signals into it after that when you click on the signals under the conduit and change their "signal type" the name you enter in the signal type box gets appended to the signal export name." Can you please elaborate it more? drag and drop to where?- Mark as New
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--- Quote Start --- Hi Matthew, I have the same problem and have not found any solution yet. I don't get this part: "When you are told to set the signal type to export you instead have to add the interface "conduit" and then drag and drop the signals into it after that when you click on the signals under the conduit and change their "signal type" the name you enter in the signal type box gets appended to the signal export name." Can you please elaborate it more? drag and drop to where? --- Quote End --- Yes, It's where you're creating the custom component, here you add the interface conduit and drag and drop the delay ctrl signals onto this interface. I found several posts where people had given up and just used 13.1 but I wanted to use Prime and the answer was in the documentation found here ftp://ftp.altera.com/up/pub/altera_material/15.1/tutorials/making_qsys_components.pdf . Also pay attention to how Qsys appends the name of the signals and make sure it matches your top level file.
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