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"Symbol as Block" Question

Altera_Forum
Honored Contributor II
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Hi, 

 

in an old project I have to maintain, I have many .bdf files where *.tdf modules are inserted as a "Symbol as block" (see attached picture). 

 

I wonder if there is some documentation about these kind of *.bdf files. It is not obvious for me which signals are connected to each other. I had to look into the netlist viewer to confirm the interconnections between the symbols "_decode" and "_counter". I think in a *.bdf file the signalrouting should be more obvious. 

 

Are the interconnections set automatically when the port names of two blocks are the same? E.g. the _win signals are the output of one block and the input of the other. Is there a rule that these signals are connected automatically? 

 

Maybe somebody can explain a little bit what the use of these "Symbols as block" is because to me it is very confusing. 

 

Thank you, 

Maik
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Altera_Forum
Honored Contributor II
518 Views

 

--- Quote Start ---  

Hi, 

 

in an old project I have to maintain, I have many .bdf files where *.tdf modules are inserted as a "Symbol as block" (see attached picture). 

 

I wonder if there is some documentation about these kind of *.bdf files. It is not obvious for me which signals are connected to each other. I had to look into the netlist viewer to confirm the interconnections between the symbols "_decode" and "_counter". I think in a *.bdf file the signalrouting should be more obvious. 

 

Are the interconnections set automatically when the port names of two blocks are the same? E.g. the _win signals are the output of one block and the input of the other. Is there a rule that these signals are connected automatically? 

 

Maybe somebody can explain a little bit what the use of these "Symbols as block" is because to me it is very confusing. 

 

Thank you, 

Maik 

--- Quote End ---  

 

 

Hi Maik, 

 

I'm not so familiar with this kind of connections, but I think the connection is done by name. The two additional conduit boxes are required, because the name different between the block and the bus. ( block "_TX", conduit "_TX_DELAYED") 

 

 

you can find more info's under : 

 

http://www.altera.com/literature/hb/qts/quartusii_handbook.pdf?gsa_pos=3&wt.oss_r=1&wt.oss="symbol%20block&quot

 

search for "conduit" in the document. 

 

Kind regards 

 

GPK
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Altera_Forum
Honored Contributor II
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Hi pletz, 

 

thanks for the hint (I would never have searched for "conduits"). 

 

I found a picture in the handbook that looked promising but the information around it was very sparsely. In the end I confirmed the assumption that the interconnections between the blocks are done either by the same name or (as you said) via these conduit boxes by looking into the RTL view after compilation. 

 

Regards, 

Maik
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Altera_Forum
Honored Contributor II
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Yes connections are done via matching names unless otherwise stated - right click the green or purple connections on the edge of the block and you can map signals to other ones. 

 

It really is a crap way of doing things.
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Altera_Forum
Honored Contributor II
518 Views

 

--- Quote Start ---  

It really is a crap way of doing things. 

--- Quote End ---  

 

 

. . . at least I'm not the only one who is thinking this way . . . .
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