Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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runtime comparison between inferring vs. instantiating memory functions?

Altera_Forum
Honored Contributor II
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Hi, 

 

Our design currently suffers from long compilation time (10+ hours) as well as large memory usage (8GB peak) in Quartus II v9.0. As the design contains a fair amount of memory blocks, we were suspecting that the problem stems from the fact that we are inferring the memory megafunctions instead of directly instantiating them.  

 

I have checked the log file and confirmed that all memory blocks are correctly inferred (i.e. not mapped to a whole bunch of registers). So my question is, does any have any experience regarding the run time (and memory usage) of inferring memory megafunctions as opposed to direct instantiation? Also, the design currently occupies roughly 35% ~ 40% of Stratix III 150. Does anyone of any idea as to whether the run time / memory usage is reasonable or not? 

 

Many thanks for any help in advance. 

 

Ching-Han
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Altera_Forum
Honored Contributor II
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Doubtful. Many years ago it was slower, where synthesis would break it all down to logic and build it back up to memories, but I'm pretty sure there's kind of an "auto-detect" of the memory and it synthesizes them very fast. 10 hours seems wrong though. How long is it for: 

1) Synthesis? 

2) Fit? 

2a) Routing - A message appears in the .fit.rpt saying how long this took. 

2b) Placement - Again, a message 

2c) Physical synthesis if you have this on - More messages for both an early and late physical synthesis, and their numbers will be part of the placement time. 

Something seems wrong, we just need to narrow down where the bottleneck is.
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