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I generate two clocks from a 288MHz input clock, one is 96MHz with -30 degree phase shift and another is 288MHz with -90 degree phase shift. Why timeQuest set 'setup relationship' to 0.001ns during timing analysis?
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Rounding error. If you look at the actual launch and latch edges, they're off by 1ps. This was improved on in TimeQuest a few releases ago, so if using something years old, it might be fixed, but there can still be problems. Using clocks that are multiples of 3 is pretty uncommon. Sometimes tweaking the input clock frequency by a ps or two fixes it.

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