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17268 Discussions

sopc pcie interupt failed

Altera_Forum
Honored Contributor II
‎03-24-2010 07:37 AM
1,500 Views

Hi, 

I am work at Quartus 9.1 SP1,the device is A2GX65,when i using SOPC to building a pcie system,some problem about interrupt is occured. 

i connect an irq port to pcie's RxmIiq port,but when i assert a irq to pcie,the pcie doesn't generate an interrupt to host. 

 

i browser the top module of sopc, find that sopc have tied RxmIrq_i to 0,and comment that "there is no irq connect ,so tied it to 0".that is not the true,because i does connect the irq port. 

 

so, i suppose that is a bug of SOPC @ Quartus 9.1 SP1,because at Quartus 9.0 SP2,there is no that problem. 

 

anyone others have this problem?
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Altera_Forum
Honored Contributor II
‎03-26-2010 01:36 PM
811 Views

Did you set the AVL_IRQ bit in Avalon-MM to PCI Express Interrupt Enable Register (Offset 0x50 of CRA Interface - Table 4-23 from PCI Express User Guide)?? 

 

I use the PCIex interrupt but not the port RxmIrq_i. I use the interrupt generation by writing the mailbox.
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Altera_Forum
Honored Contributor II
‎05-11-2010 09:30 AM
811 Views

I have the same issue - there is a bug in SOPC builder 9.1. Check the Altera support solution rd02102010_251. 

 

In my design the RxmIrq_i and RxmIrqNum_i inputs to "the_pcie" module in the SOPC toplevel are both set to 0. The slave irq outputs are left dangling. 

 

The workaround suggested doesn't work for my design - conversion circuitry from single interrupt lines to irq and irqnumber in addition to eventual clock domain crossing handling are also needed. 

 

Regards, 

Ove Brynestad
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Altera_Forum
Honored Contributor II
‎05-24-2010 06:25 PM
811 Views

I too have run into this problem and their work around does not correct my problem as I have multiple interrupt sources. Would you be able to share the code that you have that works around this problem?

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Altera_Forum
Honored Contributor II
‎05-26-2010 08:25 AM
811 Views

Unfortunately not - didn't take the effort to write it. However as a quick fix I just synced and 'or'ed the interrupts together and hardwired app_msi_num to zero. This solution is not viable but enables our driver SW developers to move on for now.

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Altera_Forum
Honored Contributor II
‎06-30-2010 06:38 PM
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Altera says this will be fixed in 10.1 late this year. If you are generating interrupts using the mailboxes, this problem doesn't apply.

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Altera_Forum
Honored Contributor II
‎01-21-2011 04:50 PM
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I've installed Quartus V10.1 and seems that this problem was not solved. I also tried the Altera's work around and I'm not able to get the interrupts on my PC. 

Anyone solved this issue ? 

 

 

Best Regards 

L.Lessa
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