Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

system.h generation with a script

Altera_Forum
Honored Contributor II
‎10-10-2013 05:50 PM
2,815 Views

I have built a design with QSYS on Quartus 13.0. I see it generates a "<my_design>.sopcinfo" file. If we run NIOS IDE most likely it will generate a "system.h" file that can be used as memory map header files in the C codes.  

I am not going to run NIOS IDE since I don't want to be involved in C code compilation! I just need a header file for my RTL simualtion environment. is there any script to read the sopc file and generate a "system.h" or any header file that I can use?
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎10-11-2013 04:34 PM
2,043 Views

We use the nios2-bsp command in our build system to automate generation of the Altera HAL BSP.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.