Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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timeout when I use E-tile transceiver toolkit working with Stratix 10 DX device

fupwang
Beginner
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Hi everyone

    I have one Stratix 10 DX board and one USB Blaster II dongle for programming. Recently I want to try E-tile IP and want to bring up FPGA with 25G SFP port. So I prepare to use E tile transceiver toolkit for debug. Then I find every times I open sof file and want to download current configuration from FPGA. it will show operation timeout and can not finish my request command. I attach a picture for reference.  I try to slow down JTAG clock. but it is useless.  even 1MHz. So can anybody help to explain what is the error here. thanks .

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Kshitij_Intel
Employee
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Hi,

 

Which operating system you are using?

Which Quartus version and device(OPN) you are targeting?

 

Please share the complete environment details.

 

Thank you

Kshitij Goel

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fupwang
Beginner
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Thanks K**bleep**ij. I think this issue was solved by release reset signals for related register. Although I do not know the detail but it is workable when software configure this registers. so I guess it may like some switchs must be enabled to download FPGA status from FPGA internal status register to external JTAG GUI. thanks again for focusing on this topic. 

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fupwang
Beginner
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Oh, sorry, I don't know why the name show confusion in my last reply. Sorry guys. 

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