what is the meaning of"cant place all ram cells in design"?

[Altera_Forum]

hi all: 

i make a project with quartus 11.1,and the chip is ep3c55f780c8. when i complie the design,an error occured.the message is"error(170040):cant place all ram cells in design".but the ram i use isnt over the chip. here is the sy nthesis result: total combinational functions 4129/55856(7%) dedicated logic registers 1882/55856(3%) total registers 3246 total memory bits 2206720/2396160(92%)    i instantiates 4 16k*32bit singal-port-ram    does anybody know that?

[Altera_Forum]

On CIII devices, memory is fitted into M9k blocks. 

With 32bit wide ram you can only use 8/9 of each block and you are not allowed to use spare bits elsewhere. This is a device constraint.  EP3C55 has 260 M9k blocks: each will be used in 256 x 32bit configuration, so you waste 256 x 4bits for each block. You need 256 blocks to synthesise your 2Mbit ram but you actually commit 2359296 physical memory bits.

[Altera_Forum]

thanks verymuch! 

so one m9k block can be used in 256x32bit or 256x36 bit,right? if i use 256x32bit,the other 256x4bit can be used for what?or be wasted?

[Altera_Forum]

The other is wasted.  

A M9k can't be shared between 2 devices.  Same behaviour occurs when you don't use all addresses. For example if you only need a 200 x 36bit ram, the unused 56 x 36bit are wasted.