what should be input to address in MAC control interface

[Altera_Forum]

address : IN STD_LOGIC_VECTOR (7 DOWNTO 0); 

 it is only 8 bit  32 bits is for 2 hex  but mac address has many hex number  so what should i input to address in MAC control interface?

[Altera_Forum]

You should supply the address of the register which you would like to read or write. 

 See page 6-3 of http://www.altera.com/literature/ug/ug_ethernet.pdf for the locations of the MAC address registers.

[Altera_Forum]

register in vhdl is reg 

 for example 00-05-5D-E8-0F-A3 it has 6 * 32 bits  how to define reg in vhdl ? is it reg[191:0] ?  or  reg : STD_LOGIC_VECTOR[191:0] := 16#00055DE80FA3#; ?  how can i know the address of register?

[Altera_Forum]

--- Quote Start ---  00-05-5D-E8-0F-A3 it has 6 * 32 bits  how to define reg in vhdl ? is it reg[191:0] ?  --- Quote End ---   No idea where you want to put 192 bits? In the transmitted packet, it's 6*8 = 48 bits.  Unfortunately, the initial post misses any context information.

[Altera_Forum]

i got it, where can find context information in IDE and find address of register or get the address of register in vhdl 

 i just hard code an mac address in a variable with type std_logic_vector, how to know its address? is there a function to get the address of it and assign the address 7:0

[Altera_Forum]

martinboy, if I understand your question(s) correctly, the answer is "it doesn't work like that". 

 You don't "get the address of register" and then use that information to program a port of the TSE MAC. There is no C/C++ equivalent of "int foo; printf("%x", &foo);"  If your objective is to initialize the MAC ADDRESS of the TSE MAC IP block, then you need to drive it's Avalon-MM control port interface with multiple transactions to perform writes to the relevant addresses.  Some useful documents for you would be: http://www.altera.com/literature/ug/ug_ethernet.pdf (the ethernet controller) http://www.altera.com/literature/manual/mnl_avalon_spec.pdf (how to drive the Avalon-MM)

[Altera_Forum]

it seems that ethernet need two clocks,  

 does it need to use one input default given to drive PLL to give more clocks then can drive ethernet's control interface and tx interface?  tomorrow is Monday, i think that i need to take a week to digest how to drive avalon-MM