I have a simple design using the HPS on an Arria 10 AS048. The HPS is only present to load the PL configuration at boot time using u-boot.
I generated a .rbf.img and a uboot-mkpimage.bin and I am trying to write them to a S25FS512 QSPI connected to the HPS configuration pins.
I could do this and make it work using a third party tool, but I am trying to do the same using quartus_hps in the command line like so :
(from the nios2 command shell)
$ quartus_hps -c 1 -o P -a 0x0 uboot-mkpimage.bin
$ quartus_hps -c 1 -o P -a 0x720000 pl.rbf.img
I am stuck at the first command because of the error shown in the attached file. The programming fails at different percentages each time.
I tried to mix in the "--boot=18" parameter with no success.
I also tried to do a $ quartus_hps -c 1 -o E which succeeds, but the writing to the flash still fails.
Does anyone have an idea about what I am missing?
Can try refer and follow this document of buiding and flashing your Arria10 u-boot QSPI image first:
There are some details on the types of generated files for QSPI booting.
Thank you for the link.
However, I am a bit lost here. Since i am using Quartus pro 19.1, there seems to be differences with what is presented in the link.
For instance, when I run make to build u-boot, I do not have any "spl/u-boot-splx4.sfp". Also, I do not have this "board/altera/arria10-socdk/fit_spl_fpga.its" file for mkimage.
I tried again earlier and for some reason I managed to successfully run "quartus_hps -c 1 -o P -a 0x0 uboot-mkpimage.bin" (I did not verify if it *truly* worked, though). I had to try several times the same command before that.
Now I am trying to run "quartus_hps -c 1 -o P -a 0x720000 pl.rbf.img", but it fails just like shown in the image attached to my first message.
Do you think the type of file I am using is the cause?
Since the "percentage of loading" at which quartus_hps is never the same, I would guess it has something to do with an unreliable state of the HPS. Does the HPS have to be in a particular state (if that makes sense) for quartus_hps to run?
I am not sure how you get/generate your boot image in the first place or documents that you refer to build your project.
Normally I use the gsrd as the base for my project build, so better try to test with a default gsrd version first.
You can try peform the QSPI flashing with quartus_hps cmd using the working gsrd example and see any difference from the outcome.
You can also find some of the prebuild gsrd in the link below:
I am refering to this user guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-a10-soc-boot.pdf
which in turn points to this link: https://rocketboards.org/foswiki/view/Documentation/A10GSRD160QspiBoot
The only differences are that I am targetting a bare metal application and using the GUI.
So in the end, I only have the "FPGA Configuration File in RBF format, with the mkimage header" and "U-Boot Binary and Device Tree, wrapped with mkpimage header" files to program in the Flash.
As for the GHRD, I found a couple designs for A10 and Quartus 19.1 with your link, thank you.
However, I could not find documentation on these. Therefore, I am not sure how to program them in my Flash memory and how to rebuild them to target my board (as I do not have a A10 SOC devkit, I fear to damage my board with wrong I/O assignments).
Are you using a custom board? I think the GSRD design will not spoiled your board.
You can try to program them following the document mentioned from previous comment:
There is a section for Arria 10 where it is using the quartus_hps cmd to flash in different generated output files.
Those files can be obtained from the GSRD link from previous comment:
Yes this is a custom board.
The quartus_hps commands in the document are the ones I am using.
It seems a solution to this is to reduce the JTAG clock speed using :
$ jtagconfig --setparam 1 JtagClock 12M
I could then run quartus_hps to program u-boot image in the Flash with no problem several times.
However it considerably slows down the programming.
Regarding jtagconfig command, I saw that setting the JtagClock to 12M actually results to a value of 6M (based on the output of a following "jtagconfig --getparam 1 JtagClock"). If I set the value to 6M, it is effectively set to 6M.
Is that a known problem? Please note that I use USB Blaster II with quartus 18.0.
Sorry for late reply, I have tested the Jtag clock thing. I think it does not support 12M as It will automatically set to 6M if I perform jtagconfig --setparma 1 JtagClock 12M.