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Hi,
I am using Quartus 24.1 with the Agilex V device (A5ED065BB32AE4SR0), and want to make some edits to the device tree so that I can blink some led's via linux cmd.
My research so far has led me to read a lot's of rocketboard posts, posts in the forums here, and more.
From what I can tell, after I conect the Platform Designer and generate HDL, then Compile in Quartus - I should be given a handoff/ folder with some files in it, and with this it should be possible to generate a preloader. Later I would then be able to edit the device tree for my the leds.
If so - why is the only file/folder generated by this process referencing `handoff` the `hps_bootloader_handoff.bin` file?
Many thanks!
K
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Hello K
In addition to Whitepau's note, below are some links to collaterals that can help guide you for your task.
If you have Agilex 5 E-Series Premium Devkit GSRD, the GSRD guides you on using the GPIO LEDs located at https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-5/e-series/premium/gsrd/ug-gsrd-agx5e-premium/
If you have Agilex 5 E-Series Modular Devkit GSRD, the GSRD guides you on using the GPIO LEDs located at https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-5/e-series/modular/gsrd/ug-gsrd-agx5e-modular/
We also have a Agilex 5 Design Hub where it can guide you to the relevant collaterals that you need for your task.
Agilex 5 Design Hub location at https://www.intel.com/content/www/us/en/products/details/fpga/agilex/5/resource.html
Agilex 5 Embedded Software with HPS guided journey located at https://www.intel.com/content/www/us/en/support/programmable/support-resources/guided-journey/agilex5/software-development.html
Thanks
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Hello K, thanks for the post.
The device tree already references GPIO LEDs, if you would like to access LEDs on a PIO IP in FPGA fabric, there should be some guidance on that too, since the GHRD already includes an LED PIO.
linux-socfpga/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts at socfpga-6.6.51-lts · altera-fpga/linux-socfpga
Which devkit are you using? Have you studied one of the GSRD tutorials? Here is the one for the Agilex™ 5 E-series premium devkit:
GSRD User Guide - Altera FPGA Developer Site
If relevant, can you please share any relevant source files?
Finally, for Agilex™ 5, the handoff information is all embedded in your FPGA image file (.sof or .rbf), we don't have a preloader anymore like we did for Cyclone V.
Please let me know if you have more questions!
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Hello K
In addition to Whitepau's note, below are some links to collaterals that can help guide you for your task.
If you have Agilex 5 E-Series Premium Devkit GSRD, the GSRD guides you on using the GPIO LEDs located at https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-5/e-series/premium/gsrd/ug-gsrd-agx5e-premium/
If you have Agilex 5 E-Series Modular Devkit GSRD, the GSRD guides you on using the GPIO LEDs located at https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-5/e-series/modular/gsrd/ug-gsrd-agx5e-modular/
We also have a Agilex 5 Design Hub where it can guide you to the relevant collaterals that you need for your task.
Agilex 5 Design Hub location at https://www.intel.com/content/www/us/en/products/details/fpga/agilex/5/resource.html
Agilex 5 Embedded Software with HPS guided journey located at https://www.intel.com/content/www/us/en/support/programmable/support-resources/guided-journey/agilex5/software-development.html
Thanks
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Hi both
Thank you very much for your reply!
I found that both these resources were extremely useful.
Many thanks,
K

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