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I recently posted a question related to a project I've been working on. I wanted help to achieve Uart-to-USB communication to transmit counting data from my DE10-Nano to my computer. This is the post: https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/How-to-obtain-the-counting-of-TTL-pulses-from-an-FPGA/m-p/1542536#M26340
ShengN helped me a lot, he even provide the modifications to the design and the C code to achieve this. However, he mentioned that I would need help from this forum with the usb putty part. I have no experience with Putty, and I'm completely new with FPGAs and hardware programming (this project was assigned to me). How can I make use of the design I got so I can transmit the counting of the FPGA to my PC.
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Hi,
Just to be clear again from the recent post, are you going for for "USB-to-UART" or the "USB part putty (HPS)"?
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Hi,
As I mentioned in the previous post, my intention is to have an FPGA counting TTL pulses, and then send the count data to a computer. To visualize it, I mentioned the idea of writing a .txt file with the counting for each interval. What I found from internet is that Uart-to-USB was a way to achieve this, so that's why I made the previous post. The response I got was the one that mentioned the "uart transmit to the putty (usb-to-uart)", however, I'm not entirely sure on what's this step about. I would appreciate some clarification on this process and the steps you mentioned.
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Hi,
Thanks for the clarification, let me check on that and get back to you.
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Hi,
Okay, just confirm with you again, you are asking on how to program .sof and .elf then full run the example design that was provided in the previous post?
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Hello,
Yes, that's pretty much it. I checked the design, but I'm not sure how to make it work properly (I'm confused regarding the PuTTY usage here). Also, I would like to know how to program the design in the FPGA and make it persistent, so it works just by plugging in the cables. The model I'm using is Cyclone V 5CSEBA6U23I7. I'm thinking the detector will be connected through the GPIO.
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Hi,
Thanks for confirming, which Quartus version have you installed ? Have you done any Quartus or Nios II programming in the past?
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Hi,
I'm using Quartus Prime Lite Edition, 22.1std.2 Build 922. And no, I haven't done anything before with Quartus nor Nios II; as I stated in the previous post, I'm new to hardware programming, but because I have some knolewdge in high level programming languages, I was able to create the design I showed in the previous post using Verilog HDL. The reason of my previous post was to get some help with the process of transmitting the information to my computer; the person who answered me provided the updated design.
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Hi,
In the previous post the design is for Cyclone V SoC board that would have a separate UART pin on the FPGA side, for your DE10 nano board, you only have the HPS UART pin, which means you need to use the HPS to use the UART.
I will try my best to guide you to get it a design working on your board, for future support it would be best if you contact Terasic directly, anyway:
Okay, you can follow the available Terasic Design instead:
The steps there are pretty much very detailed.
With that design your C code that you would want, you can include them in the "my_first_hps" folder, which would be executed in Linux when you boot Linux on your board. (I would suggest run all default and see the default output, only then you may change or add your own code)
For your future reference all resource for your board is available in:
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=205&No=1046&PartNo=4
FYI, I will be out until Christmas, and I will get back to you when I am back. We apologies for the inconvenience, I appreciate your patience.
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Hi,
Do you need further support?
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Hello,
Sorry for late response, I didn't have the time to check on things until now. I have followed the tutorial provided for the 'my_first_hps' project. However, I'm a little lost on certain things. In the project I have so far (the one from the previous post) there is a 'software' folder which contains different files. Now, if I understand correctly, if I want to make my design work, and have a text file with the counting data of the pulses detected by the FPGA, I need to replace the C files in 'my_first_hps' folder, with the C files from the 'software' folder in my current design. Then make the process of compiling and copying the executable file into the Linux system of the FPGA's SD card. Is this correct? Another thing is, I mentioned before that I would want this design to be persistent, meaning that, I want to connect the FPGA to the detector and a PC to have the counting, how can I achieve this?
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Hi,
If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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