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I want to implement the HPS -> SDM mailbox communication in linux for INTEL Agilex 5 chipset.
I find there are two ways to do it. One is through the direct mailbox configuration through the memory mapped registers. other one is through the INTEL FPGA IP.
I am confused which one is supported from linux. Request help to confirm on this
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Hi Tiwari,
Sorry for the late response. I did not get the email notification hence i missed your reply.
My assumption is that we have to send a HWMON READ TEMP SMC command to the ATF and ATF will handle the mailbox part and provide the response through the SMC call. Please correct me if i am wrong.
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
