Unable to set FAT_SUPPORT when generating preloader with bsp-editor for Arria 10 SoC

[RubenPadial]

Hello,

I'm following the Rocketboard guide (https://www.rocketboards.org/foswiki/Documentation/EmbeddedLinuxBeginnerSGuide#2) to familiarize with Embedded Linux development with my Arria10 SoC Dev kit. I created and compiled a project in Quartus/Platform Designer.

I run the bsp-editor from EDS 20.1 and select the "hps_isw_handoff" as the Preloader settings directory but common settings are not displayed in bsp.editor and I cannot set FAT_SUPPORT.

How can I set the FAT_SUPPORT option?

Is there a specific guideline for A10?

[Jeet14]

Hi

Starting with 20.3 Pro, the SoC EDS was discontinued, and the functionality of the components of SoC EDS is provided separately. The new flow does not need the bsp-editor tool anymore,

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10

If you want to continue the old flow then, you can refer the below links.

https://www.rocketboards.org/foswiki/Documentation/SoCSWWS1IntroToAlteraSoCDevicesLab1Preloader

https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/SoC-FPGA%20Design%20Guide_EPFL.pdf

Regards

Tiwari

[Jeet14]

Hi,

Let me know if you have any question on this.

Regards

Tiwari

[Jeet14]

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

[RubenPadial]

Hello, I tried using the document you suggest (https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/SoC-FPGA%20Design%20Guide_EPFL.pdf) but I was not able to build the preloader because FAT_SUPPORT option doesn't appear. 

[KennyTan_Altera]

case reopen

[Jeet14]

Hi,

The shared link https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/SoC-FPGA%20Design%20Guide_EPFL.pdf is using the SoCEDS and you need to use the SoC Embedded Design Suite v14.0.

Regards

Tiwari

[RubenPadial]

Hello @Jeet14,

I'm actually using SoC EDS v20 (as mentioned in the first comment). Could you explain the difference between SoC EDS and the SoC Embedded Design Suite? Apparently, they are the same. Is the version a problem? I couldn’t find any version requirements in the Arria 10 documentation:  https://www.intel.com/content/www/us/en/docs/programmable/683227/current/installing-the-altera-soc-embedded-development.html

Is there any official guideline for Arria 10?

[Jeet14]

Hi,

Yes both are same.

But there are changes in older versions to v20.1

So, you can try using the older SoC EDS v14.0

Note: Actually SoC EDS is a discontinued product, and is no longer supported.(Reference-https://www.rocketboards.org/foswiki/Documentation/SoCEDS) 

Regards

Tiwari

[Jeet14]

Hi,

Please let me know if you have any query on this.

Regards

Tiwari

[Jeet14]

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.