Where is cv_bsp_generator.py

[rdb9878]

Trying to follow the steps for building u-boot/bootloader from here:

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10

It gets to a step where it calls a python script cv_bsp_generator.py, claiming it's in this directory:

$TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/arch/arm/mach-socfpga/cv_bsp_generator

But that directory doesn't exist in the repo. 

Where is cv_bsp_generator.py?

[EBERLAZARE_I_Intel]

Hi,

Which U-boot version are you using to build?

Also, have you followed all the steps properly?

The file is there:

https://github.com/altera-opensource/u-boot-socfpga/blob/socfpga_v2022.07/arch/arm/mach-socfpga/cv_b...

Is it not there when after you do git checkout?

If so, could you re-try the Build U-boot steps again and let me know the results.

[EBERLAZARE_I_Intel]

Hi,

Do you have any update?

Can you check my previous respond?

[rdb9878]

I'm using the version called out in my original link, which is the tutorial that all things seem to point to for SPL builds. The script is not included in that version. It is included in the version you linked. There seems to be a disconnect between that tutorial and the repo version.

[rdb9878]

It would also be nice if the scripts could be ported to python 3 (it's only been out for 15 years), or at least add details to the guide on the easiest way to run them, because simply installing python and running the scripts causes them to crash in several locations: ex, print parenthesis, unicode not defined, str =/= bytes.

[rdb9878]

I cannot get the SPL u-boot build to complete. This is the error message:

arch/arm/mach-socfpga/wrap_sdram_config.c:236:2: error: #error LPDDR2 and other DRAM types are not yet supported

Well LPDDR2 is the memory type I am dealing with for my board, and that seems to be a valid selection in the Quartus HPS configuration menu:

<parameter name="HPS_PROTOCOL" value="LPDDR2" />

and that is how the part is advertised on Intel's product webpage:

"Multiport SDRAM controller with support for DDR2, DDR3, DDR3L, and LPDDR2"

So how do I get around this issue?

[EBERLAZARE_I_Intel]

Hi,

Thanks for the follow-up, that is seem to be an uncommon error that I have seen.

Can you quick share your Quartus design files? Which exact Quartus version are you using again?

I would really like to replicate this issue from my side.

[EBERLAZARE_I_Intel]

Hi,

I am just checking, do you have update from your side?